AMIS30512C5122G ON Semiconductor, AMIS30512C5122G Datasheet - Page 15

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AMIS30512C5122G

Manufacturer Part Number
AMIS30512C5122G
Description
IC MOTOR DVR MICRO STEP 24SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of AMIS30512C5122G

Applications
Stepper Motor Driver, 2 Phase
Number Of Outputs
1
Current - Output
800mA
Voltage - Supply
6 V ~ 30 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Operating Temperature Classification
Automotive
Package Type
SOIC
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.25V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Load
-
Lead Free Status / Rohs Status
Compliant
Direction
combination of the DIR input pin and the SPI−controlled
direction bit <DIRCTRL>. (Table 14: SPI Control Register 1)
NXT Input
one step up/down in the translator table. Depending on the
NXT−polarity bit <NXTP> (Table 14: SPI Control Register
1), the next step is initiated either on the rising edge or the
falling edge of the NXT input.
Synchronization of Step Mode and NXT Input
(Table 13: SPI Control Register 0), then this is put in effect
immediately upon the first arriving “NXT” input. If the
micro−stepping resolution is increased (see Figure 11 left
hand side) then the coil currents will be regulated to the
nearest micro−step, according to the fixed grid of the
increased resolution. If however the micro−stepping
resolution is decreased, then it is possible to introduce an
offset (or phase shift) in the micro−step translator table.
position that is shared both by the old and new resolution
The direction of rotation is selected by means of following
Changes on the NXT input will move the motor current
When step mode is re−programmed to another resolution
If the step resolution is decreased at a translator table
Start = 0
1/4
SM[2:0] = 011
th
micro step
I
y
Step 1
NXT
Step 2
Step 3
Figure 9. Translator Table: Circular and Square
Figure 10. Translator Position Timing Diagram
Translator Position
I
x
Update
Uncompensated Half Step
Start = 0
http://onsemi.com
SM[2:0] = 101
I
y
15
Translator Position
Register 3. This is a 7−bit number equivalent to the 1/32th
micro−step from Table 9: Circular Translator Table. The
translator position is updated immediately following a NXT
trigger.
setting, then the offset is zero and micro−stepping proceeds
according to the translator table.
position that is shared both by the old and new resolution
setting, then the offset is zero and micro-stepping is
proceeds according to the translator table.
new resolution setting, then the micro−stepping proceeds
with an offset relative to the translator table (See Figure 11
right hand side).
Step 1
The translator position can be read in Table 30: SPI Status
If the step resolution is decreased at a translator table
If the translator position is not shared both by the old and
Step 2
Step 3
Translator Position
Update
I
x
Start = 0
Step 3
SM[2:0] = 110
Full Step
I
y
Step 2
Step 1
I
x

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