ADP3624ARDZ Analog Devices Inc, ADP3624ARDZ Datasheet - Page 7

IC DRIVER DUAL 4A NONINV 8SOIC

ADP3624ARDZ

Manufacturer Part Number
ADP3624ARDZ
Description
IC DRIVER DUAL 4A NONINV 8SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADP3624ARDZ

Configuration
Low-Side
Input Type
Non-Inverting
Delay Time
14ns
Current - Peak
4A
Number Of Configurations
2
Number Of Outputs
2
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width) Exposed Pad, 8-eSOIC. 8-HSOIC
Device Type
MOSFET
Module Configuration
Low Side
Peak Output Current
4A
Output Resistance
80kohm
Input Delay
14ns
Output Delay
22ns
Supply Voltage Range
4.5V To 18V
Driver Case Style
SOIC
No.
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADP3624ARDZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. ADP3623/ADP3633 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Table 4. ADP3624/ADP3634 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
SD
INA
PGND
INB
OUTB
VDD
OUTA
OTW
Mnemonic
SD
INA
PGND
INB
OUTB
VDD
OUTA
OTW
Description
Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low.
Inverting Input Pin for Channel A Gate Driver.
Ground. This pin should be closely connected to the source of the power MOSFET.
Inverting Input Pin for Channel B Gate Driver.
Output Pin for Channel B Gate Driver.
Power Supply Voltage. Bypass this pin to PGND with a ~1 µF to 5 µF ceramic capacitor.
Output Pin for Channel A Gate Driver.
Overtemperature Warning Flag. Open drain, active low.
Description
Output Shutdown. When high, this pin disables normal operation, forcing OUTA and OUTB low.
Input Pin for Channel A Gate Driver.
Ground. This pin should be closely connected to the source of the power MOSFET.
Input Pin for Channel B Gate Driver.
Output Pin for Channel B Gate Driver.
Power Supply Voltage. Bypass this pin to PGND with a ~1 µF to 5 µF ceramic capacitor.
Output Pin for Channel A Gate Driver.
Overtemperature Warning Flag. Open drain, active low.
NOTES
1. THE EXPOSED PAD OF THE PACKAGE IS NOT DIRECTLY
NOTES
1. THE EXPOSED PAD OF THE PACKAGE IS NOT DIRECTLY
ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635
CONNECTED TO ANY PIN OF THE PACKAGE, BUT IT IS
ELECTRICALLY AND THERMALLY CONNECTED TO THE DIE
SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE.
CONNECTED TO ANY PIN OF THE PACKAGE, BUT IT IS
ELECTRICALLY AND THERMALLY CONNECTED TO THE DIE
SUBSTRATE, WHICH IS THE GROUND OF THE DEVICE.
Figure 7. ADP3623/ADP3633 Pin Configuration
Figure 8. ADP3624/ADP3634 Pin Configuration
PGND
PGND
INA
INB
INA
INB
SD
SD
1
2
3
4
1
2
3
4
Rev. A | Page 7 of 16
(Not to Scale)
(Not to Scale)
ADP3623/
ADP3624/
ADP3633
ADP3634
TOP VIEW
TOP VIEW
8
7
6
5
8
7
6
5
OTW
OUTA
VDD
OUTB
OTW
OUTA
VDD
OUTB

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