LT4256-2CS8 Linear Technology, LT4256-2CS8 Datasheet - Page 9

IC CTRLR HOTSWAP HV AUTO 8SOIC

LT4256-2CS8

Manufacturer Part Number
LT4256-2CS8
Description
IC CTRLR HOTSWAP HV AUTO 8SOIC
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheet

Specifications of LT4256-2CS8

Applications
General Purpose
Internal Switch(s)
No
Voltage - Supply
10.8 V ~ 80 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
When the power pins first make contact, transistor Q1 is
held off. If the voltage on V
programmed undervoltage threshold, V
and the voltage on TIMER is less than 4.65V (typ), transis-
tor Q1 will be turned on (Figure 6). The voltage on GATE
rises with a slope equal to 32µA/C1 and the supply inrush
current is set at:
where C
To reduce inrush current, increase C1 or decrease load
capacitance. If the voltage across the current sense resis-
tor R5 reaches V
limited by the internal current limit circuitry. The voltage
on GATE is adjusted to maintain a constant voltage across
the sense resistor and TIMER begins to charge.
When the FB voltage goes above the low-to-high V
threshold, PWRGD goes high.
Undervoltage Detection
The LT4256-1/LT4256-2 uses UV to monitor the V
voltage to determine when it is safe to turn on the load and
allow the user the greatest flexibility for setting the thresh-
old. Any time that UV goes below 3.6V, GATE will be pulled
low until UV goes above 4V again.
The UV threshold should never be set below the internal
UVLO threshold (9.8V typically) because the benefit of
UV’s hysteresis will be lost, making the LT4256-1/
I
INRUSH
L
is the total load capacitance.
= C
L
• 32µA/C1
SENSETRIP
U
GND
48V
V
IN
(SHORT PIN)
U
, the inrush current will be
0.1µF
CC
C3
is above the externally
W
SMAT70A
CC
R1
64.9k
R2
8.06k
D2
is above 9.8V,
Figure 5. 1600mA, 48V Application
C2
33nF
1
5
U
UV
TIMER
V
CC
LT4256-1/
LT4256-2
8
0.025Ω
GND
R5
(1)
CC
4
FB
SENSE
PWRGD
GATE
7
FB
LT4256-2 more susceptible to noise (V
9.8V when UV is at its 3.6V threshold). UV is filtered with
C3 to prevent noise spikes and capacitively coupled glitches
from shutting down the LT4256-1/LT4256-2 output
erroneously.
To calculate the UV threshold, use the following equations:
where V
V
6
2
3
CC
IRF530
R
20
V
500mA/DIV
Q1
is rising (L-H), etc.
1
THUVLH
UV = 36V
PWRGD = 40V
k
50V/DIV
50V/DIV
50V/DIV
R6
10Ω
PWRGD
=
R7
100Ω
Ω ≤
C1
10nF
GATE
V
R
THUVLH
I
OUT
OUT
2
D1
CMPZ5241B
11V
R
=
V
1
C
L
THUVLH
+
3 6 1
Figure 6. Start-Up Waveforms
= 125µF
is the desired UV threshold voltage when
4
.
R
V
2 200
LT4256-1/LT4256-2
+
R8
36.5k
R9
4.02k
R
R
1
2
4256 F05
1
k
R4
27k
+
PWRGD
5ms/DIV
C
L
V
48V
1.6A
OUT
CC
must be at least
4256 F06
425612fa
9
(2)
(3)
(4)

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