ADE7754ARRL Analog Devices Inc, ADE7754ARRL Datasheet - Page 18

• Manufacturer Part Number: ADE7754ARRL
• Description: IC ENERGY METERING 24-SOIC TR
• Manufacturer: Analog Devices Inc

Specifications of ADE7754ARRL

• Rohs Status: RoHS non-compliant
• Input Impedance: 370 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.8V
• Current - Supply: 7mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Meter Type: 3 Phase
• For Use With: EVAL-ADE7754EBZ - BOARD EVALAUTION FOR ADE7754

ADE7754
Figure 24 shows the signal processing in each phase for the
active power in the ADE7754.
Figure 25 shows the maximum code (hexadecimal) output
range of the active power signal (after AWG). Note that the
output range changes depending on the contents of the active
power gain and watt gain registers. See the Current Channel
ADC section. The minimum output range is given when the
active power gain and watt gain registers contents are equal to
800h, and the maximum range is given by writing 7FFh to the
active power gain and watt gain registers. These can be used to
calibrate the active power (or energy) calculation in the
ADE7754 for each phase and the total active energy. See the
Total Active Power Calculation section.
Power Offset Calibration
The ADE7754 also incorporates an active offset register on each
phase (AAPOS, BAPOS, and CAPOS). These are signed twos
complement 12-bit registers that can be used to remove offsets
in the active power calculations. An offset may exist in the
power calculation because of crosstalk between channels on the
PCB or in the IC itself. The offset calibration allows the con-
tents of the active power register to be maintained at zero when
no power is being consumed.
One LSB in the active power offset register is equivalent to one
LSB in the 28-bit energy bus displayed in Figure 24. Each
time power is added to the internal active energy register, the
content of the active power offset register is added. See the
Total Active Power Calculation section. Assuming the average
value from LPF2 is 8637BCh (8,796,092d) with full ac scale
inputs on current channel and voltage channel, then one LSB in
the LPF2 output is equivalent to 0.011% of measurement error
at –60 dB down of full scale. See the Calibration of a 3-Phase
Meter Based on the ADE7754 Application Note AN-624.
EC56D5Ch
Figure 25. Active Power Calculation Output Range
13A92A4h
68DB8Ch
0000000h
D1B717h
2E48E9h
972474h
D70A3Eh
28F5C2h
ACTIVE
POWER
V
I
00h
000h 7FFh
CURRENT SIGNAL – i(t)
–100% TO +100% FS
D70Bh
28F5h
00h
VOLTAGE SIGNAL – v(t)
–100% TO + 100% FS
VOLTAGE CHANNEL
CURRENT CHANNEL
800h
HPF
1
+ 100% F5
+ 50% FS
– 50% FS
– 100% FS
+ 150% FS
– 150% FS
1V/GAIN1
AAPGAIN[11:0] OR AWGAIN[11:0]
1V/GAIN2
0.5V/GAIN2
0.5V/GAIN1
Figure 24. Active Power Signal Processing
MULTIPLIER
POWER SIGNAL – p(t)
INSTANTANEOUS
24
–18–
SGN
SGN
LPF2
Reverse Power Information
The ADE7754 detects when the current and voltage channels
of any of the three phase inputs have a phase difference greater
than 90° (i.e., |
can detect wrong connection of the meter or generation of
active energy.
The reverse power information is available for Phase A, Phase B,
and Phase C, respectively, by reading Bits 12 to 14 of the CFNUM
register. See Table XI. The state of these bits represents the
sign of the active power of the corresponding phase. Logic 1
corresponds to negative active power.
The AENERGY phase selection bits (WATSEL bits of the
WATMode register) enable the negative power detection per
phase. If Phase A is enabled in the AENERGY accumulation,
Bit 5 of WATMode register sets to Logic 1 and the negative
power detection for Phase A—Bit 12 of CFNUM register—
indicates the direction of the active energy. If Phase A is
disabled in the AENERGY register, the negative power bit for
Phase A is set to Logic 0.
TOTAL ACTIVE POWER CALCULATION
The sum of the active powers coming from each phase provides
the total active power consumption. Different combinations of
the three phases can be selected in the sum by setting Bits 7 and
6 of the WATMode register (mnemonic WATMOD[1:0]).
Figure 26 demonstrates the calculation of the total active power,
which depends on the configuration of the WATMOD bits in
the WATMode register. Each term of the formula can be disabled
or enabled by setting WATSEL bits respectively to Logic 0 or
Logic 1 in the WATMode register. The different configurations
are described in Table I.
WATMOD WATSEL0
0d
1d
2d
Note that I
samples after APGAIN correction and high-pass filtering.
SGN
SGN
28
SGN
Table I. Total Active Power Calculation
A
APOS[11:0]
*, I
2
V
V
V
10
A
A
A
B
+
*, and I
A
| or |
I
(I
(I
A
2
A
A
*
4
*–I
*–I
2
3
C
B
B
B
*)
*)
* represent the current channel
AWG
| or |
2
2
12
2
WATSEL1
+ V
+ 0
+ 0
1
D1B717h
2
C
B
0
| > 90°). This mechanism
ACTIVE POWER
SIGNAL – P
I
B
*
WATSEL2
+ V
+ V
+ V
C
C
C
I
(I
I
C
C
REV. 0
C
*
*
*–I
B
*)