MCP3905A-I/SS Microchip Technology, MCP3905A-I/SS Datasheet - Page 13

• Manufacturer Part Number: MCP3905A-I/SS
• Description: IC POWER METERING-1 PHASE 24SSOP
• Manufacturer: Microchip Technology

Specifications of MCP3905A-I/SS

• Input Impedance: 390 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.85V
• Current - Supply: 2.7mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP (0.200", 5.30mm Width)
• Meter Type: Single Phase
• Brief Features: Active Real Power Pulse Output, Ultra Low Drift
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: SSOP
• No. Of Pins: 24
• Svhc: No
• Ic Function: Single Phase Energy Metering
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP3905RD-PM1 - REFERENCE DESIGN FOR MCP3905MCP3905EV - BOARD DEMO FOR MCP3905
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.1
The MCP3905A/05L/06A analog inputs can be
connected directly to the current and voltage
transducers (such as shunts or current transformers).
Each input pin is protected by specialized ESD struc-
tures that are certified to pass 5 kV HBM and 500V MM
contact charge. These structures also allow up to ±6V
continuous voltage to be present at their inputs without
the risk of permanent damage.
Both channels have fully differential voltage inputs for
better noise performance. The absolute voltage at each
pin relative to A
range during operation in order to ensure the measure-
ment error performance. The common-mode signals
should be adapted to respect both the previous
conditions and the differential input voltage range. For
best performance, the common-mode signals should
be referenced to A
The current channel comprises a PGA on the front-end
to allow for smaller signals to be measured without
additional signal conditioning. The maximum differen-
tial voltage specified on Channel 0 is equal to
±470 mV/Gain (see
voltage specified on Channel 1 is equal to ±660 mV.
TABLE 4-1:
TABLE 4-2:
4.2
The ADCs used in the MCP3905A/05L/06A for both
current and voltage channel measurements are delta-
sigma ADCs. They comprise a second-order, delta-
sigma modulator using a multi-bit DAC and a third-
order SINC filter. The delta-sigma architecture is very
appropriate for the applications targeted by the
MCP3905A/05L/06A because it is a waveform-oriented
converter architecture that can offer both high linearity
and low distortion performance throughout a wide input
dynamic range. It also creates minimal requirements
for the anti-aliasing filter design. The multi-bit architec-
© 2006 Microchip Technology Inc.
.
G1
G1
0
0
1
1
0
0
1
1
Analog Inputs
16-Bit Delta-Sigma A/D Converters
G0
G0
0
1
0
1
0
1
0
1
GND
MCP3905A/MCP3905L GAIN
SELECTIONS
MCP3906A GAIN
SELECTIONS
GND
should be maintained in the ±1V
Table
CH0 Gain
CH0 Gain
.
16
32
16
1
2
8
1
8
4-1). The maximum peak
CH0 Voltage
CH0 Voltage
Maximum
Maximum
±470 mV
±235 mV
±470 mV
±60 mV
±30 mV
±15 mV
±60 mV
±30 mV
ture used in the ADC minimizes quantization noise at
the output of the converters without disturbing the
linearity.
Both ADCs have a 16-bit resolution, allowing wide input
dynamic range sensing. The oversampling ratio of both
converters is 64. Both converters are continuously
converting during normal operation. When the MCLR
pin is low, both converters will be in Reset and output
code 0x0000h. If the voltage at the inputs of the ADC is
larger than the specified range, the linearity is no longer
specified. However, the converters will continue to
produce output codes until their saturation point is
reached. The DC saturation point is around 700 mV for
Channel 0 and 1V for Channel 1, using internal voltage
reference.
The clocking signals for the ADCs are equally
distributed between the two channels in order to
minimize phase delays to less than 1 MCLK period
(see Section 3.2 “High-Pass Filter Input Logic Pin
(HPF)”). The SINC filters main notch is positioned at
MCLK/256 (14 kHz with MCLK = 3.58 MHz), allowing
the user to be able to measure wide harmonic content
on either channel. The magnitude response of the
SINC filter is shown in
FIGURE 4-2:
Response (MCLK = 3.58 MHz).
4.3
The MCP3905A/05L/06A devices contain an internal
voltage reference source specially designed to mini-
mize drift over temperature. This internal V
reference voltage to both current and voltage channels
ADCs. The typical value of this voltage reference is
2.4V ±100 mV. The internal reference has a very low
typical temperature coefficient of ±15 ppm/°C, allowing
the output frequencies to have minimal variation with
respect to temperature since they are proportional to
(1/V
The output pin for the voltage reference is REFIN/OUT.
Appropriate bypass capacitors must be connected to
the REFIN/OUT pin for proper operation (see
Section 5.0
MCP3905A/05L/06A
REF
-100
-120
-20
-40
-60
-80
)².
0
Ultra-Low Drift V
0
“Applications
5
SINC Filter Magnitude
Figure
10
Frequency (kHz)
15
4-2.
REF
Information”).
20
DS22011A-page 13
REF
25
supplies
30
The