CS5464-ISZ Cirrus Logic Inc, CS5464-ISZ Datasheet - Page 33

• Manufacturer Part Number: CS5464-ISZ
• Description: IC ENERGY METERING 1PHASE 28SSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5464-ISZ

• Package / Case: 28-SSOP
• Input Impedance: 30 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 0.8V
• Voltage - I/o Low: 0.2V
• Current - Supply: 3.5mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Meter Type: Single Phase
• Output Voltage Range: 2.4 V to 2.6 V
• Input Voltage Range: 2.4 V to 2.6 V
• Input Current: 100 nA
• Power Dissipation: 500 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 5V
• No. Of Outputs: 3
• Power Dissipation Pd: 500mW
• Supply Voltage Range: 3.3V To 5V
• No. Of Pins: 28
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1554 - BOARD EVAL FOR CS5464 ADC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1194-5

8.3 Page 1 Registers
8.3.1 DC Offset for Current (I1
8.3.2 Gain for Current (I1
8.3.3 Power Offset (P1
8.3.4 AC Offset for Current (I1
DS682F1
MSB
MSB
MSB
MSB
-(2
-(2
-(2
2
1
Address: 0 ( I1
0
Default = 0
DC offset registers I1
selected registers are written with the inverse of the DC offset measured. The application program can also write
the DC offset register values. These are two's complement values in the range of -1.0 ≤ value < 1.0, with the
binary point to the right of the MSB.
Address: 1 ( I1
Default = 1.0
Gain registers I1
selected register are written with the multiplicative inverse of the gain measured. These are unsigned fixed-point
values in the range of 0 ≤ value < 4.0, with the binary point to the right of the second MSB.
0
Default = 0
Power offset P1
P1
values in the range of -1.0 ≤ value < 1.0, with the binary point to the right of the MSB.
Address: 5 ( I1
0
Default = 0
AC offset registers I1
the RMS results before being stored to the RMS result registers. They can be used to reduce systematic errors
in the RMS results. These are two's complement values in the range of -1.0 ≤ value < 1.0, with the binary point
to the right of the MSB.
)
)
)
Address: 4 ( P1
AVG
2
2
2
2
-1
-1
-1
0
( P2
AVG
2
2
2
2
-2
-1
-2
-2
OFF
GAIN
ACOFF
) register results. It can be used to reduce systematic energy errors. These are two's complement
OFF
GAIN
OFF
), 2 ( V1
), 3 ( V1
2
2
2
2
( P2
), 6 ( V1
-3
-2
-3
-3
ACOFF
OFF
& V1
), 11 ( P2
OFF
OFF
GAIN
OFF
& V1
GAIN
GAIN
, P2
2
2
2
2
) is added to instantaneous power and averaged over a low-rate interval to yield
& V1
ACOFF
-4
-3
-4
-4
), 7 ( I2
, I2
ACOFF
OFF
OFF
OFF
), 8 ( I2
(
OFF
I2
ACOFF
GAIN
GAIN
), 12 ( I2
2
2
2
2
, I2
(
)
-5
-4
-5
-5
I2
OFF
)
OFF
GAIN
, I2
OFF
& V2
) and Voltage (V1
), 9 ( V2
(
V
ACOFF
2
2
2
2
& V2
ACOFF
), 10 ( V2
ACOFF
-6
-5
-6
-6
) and Voltage (V1
GAIN
OFF
OFF
)
), 13 ( V2
) and Voltage (V1
&
2
2
2
2
are initialized to 1.0 on reset. During AC or DC gain calibration,
-7
-6
-7
-7
)
V2
)
GAIN
are initialized to zero on reset. During DC offset calibration,
ACOFF
)
.....
.....
.....
.....
ACOFF
GAIN
)
are initialized to zero on reset. These are added to
2
2
2
2
OFF
)
-17
-16
-17
-17
, V2
, V2
ACOFF
GAIN
2
2
2
2
-18
-17
-18
-18
OFF
)
, V2
)
2
2
2
2
-19
-18
-19
-19
ACOFF
2
2
2
2
-20
-19
-20
-20
)
2
2
2
2
-21
-20
-21
-21
CS5464
2
2
2
2
-22
-21
-22
-22
LSB
LSB
LSB
LSB
2
2
2
2
-23
-22
-23
-23
33