ISL94201IRZ Intersil, ISL94201IRZ Datasheet - Page 10

IC MULTI LI-ION AFE 24-QFN

ISL94201IRZ

Manufacturer Part Number
ISL94201IRZ
Description
IC MULTI LI-ION AFE 24-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL94201IRZ

Function
Over/Under Voltage Protection
Battery Type
Lithium-Ion (Li-Ion)
Voltage - Supply
5 V ~ 10 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL94201IRZ
Manufacturer:
Intersil
Quantity:
25
Part Number:
ISL94201IRZ
Manufacturer:
INTERSIL
Quantity:
20 000
Configuration Registers
The device is configured for specific application
requirements using the Configuration Registers. The
configuration registers consist of SRAM memory.
.
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
6:0
BIT
7
ATMPOFF
Turn off automatic external temp scan
DIS3
Disable 3.3V regulator
TMP3ON
Turn on Temp 3.3V
RESERVED
RESERVED
POR
Force POR
DISWKUP
Disable WKUP pin
WKPOL
Wake Up Polarity
FSETEN
Enable discharge set writes
RESERVED
RESERVED
UFLG3
User Flag 3
UFLG2
User Flag 3
RESERVED
RESERVED
RESERVED
SLEEP
Force Sleep
RESERVED
FUNCTION
FUNCTION
FUNCTION
10
TABLE 6. FEATURE SET CONFIGURATION REGISTER (ADDR: 07H)
When set to “1”, allows writes to the Feature Set register. When set to “0”, prevents writes to the Feature
Set register (Addr: 07H). Default on initial power up is “0”.
Reserved for future expansion.
Reserved for future expansion.
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO
turns off.
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO
turns off.
Reserved for future expansion.
Reserved for future expansion.
Reserved for future expansion.
TABLE 7. WRITE ENABLE REGISTER (ADDR: 08H)
TABLE 5. CONTROL REGISTER (ADDR: 04H)
Setting this bit to “1” forces the device to go into a sleep condition. This turns off the voltage
regulator. The SLEEP bit is automatically reset to “0” when the device wakes up. This bit does
not reset the AO3:AO0 bits.
Reserved for future expansion.
When set to ‘1’ this bit disables the automatic temperature scan. When set to ‘0’, the temperature
is turned on for 5ms in every 640ms.
Setting this bit to “1” disables the internal 3.3V regulator. Setting this bit to “1” requires that there
be an external 3.3V regulator connected to the RGO pin.
Setting this bit to “1” turns ON the TEMP3V output to the external temperature sensor. The
output will remain on as long as this bit remains “1”.
Reserved for future expansion.
Reserved for future expansion.
Setting this bit to “1” forces a POR condition. This resets all internal registers to zero.
Setting this bit to “1” disables the WKUP pin function.
CAUTION: Setting this pin to ‘1’ prevents a wake up condition. If the device then goes to sleep,
it cannot be waken without a communication link that resets this bit, or by power cycling the
device.
Setting this bit to “1” sets the device to wake up on a rising edge at the WKUP pin.
Setting this bit to “0” sets the device to wake up on a falling edge at the WKUP pin.
ISL94201
This memory is powered by the RGO output. In a sleep
condition, an internal switch converts power for the contents
of these registers from RGO to the VCELL1 input.
DESCRIPTION
DESCRIPTION
DESCRIPTION
July 3, 2008
FN6719.0

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