M48Z18-100PC1 STMicroelectronics, M48Z18-100PC1 Datasheet - Page 14

IC NVSRAM 64KBIT 100NS 28DIP

M48Z18-100PC1

Manufacturer Part Number
M48Z18-100PC1
Description
IC NVSRAM 64KBIT 100NS 28DIP
Manufacturer
STMicroelectronics
Datasheets

Specifications of M48Z18-100PC1

Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
64K (8K x 8)
Speed
100ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP Module (600 mil), 28-EDIP
Data Bus Width
8 bit
Organization
8 Kb x 8
Interface Type
Parallel
Access Time
100 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Operating Current
80 mA
Maximum Operating Temperature
70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Capacitance, Input
10 pF
Capacitance, Output
10 pF
Current, Input, Leakage
±1 μA
Current, Operating
80 mA
Current, Output, Leakage
±1
Data Retention
11 yrs.
Density
64K
Package Type
PCDIP28
Power Dissipation
1 W
Temperature, Operating
0 to +70 °C
Time, Access
100 ns
Time, Fall
≤5 ns
Time, Rise
≤5 ns
Voltage, Input, High
4.8 to 5.8 V
Voltage, Input, Low
0.8 V
Voltage, Output, High
2.4 V
Voltage, Output, Low
0.4 V
Voltage, Supply
4.5 to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2877-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M48Z18-100PC1
Manufacturer:
ALCO
Quantity:
3 000
Part Number:
M48Z18-100PC1
Manufacturer:
ST
0
Part Number:
M48Z18-100PC1
Manufacturer:
ST
Quantity:
20 000
DC and AC parameters
Table 8.
1. Valid for ambient operating temperature: T
2. Outputs deselected.
Figure 9.
Note:
14/20
Symbol
I
I
I
V
LO
V
I
V
CC1
CC2
V
I
CC
OH
LI
OL
IH
IL
(2)
V CC
V PFD (max)
V PFD (min)
V SO
INPUTS
OUTPUTS
Input leakage current
Output leakage current
Supply current
Supply current (standby) TTL
Supply current (standby) CMOS
Input low voltage
Input high voltage
Output low voltage
Output high voltage
DC characteristics
Power down/up mode AC waveforms
Inputs may or may not be recognized at this time. Caution should be taken to keep E high as
V
rises above V
reset is being applied to the processor, a reset condition may not occur until after the system
is running.
CC
tPD
rises past V
(PER CONTROL INPUT)
VALID
Parameter
RECOGNIZED
PFD
tF
PFD
(min) but before normal system operations begin. Even though a power on
(min). Some systems may perform inadvertent WRITE cycles after V
A
tFB
= 0 to 70 °C; V
Doc ID 2424 Rev 7
0 V ≤ V
Test condition
0 V ≤ V
E = V
CC
Outputs open
I
I
OL
OH
tDR
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where noted
E = V
= 2.1 mA
CC
= –1 mA
OUT
IN
DON'T CARE
HIGH-Z
– 0.2 V
IH
≤ V
≤ V
CC
CC
(1)
tRB
–0.3
Min
2.2
2.4
NOTE
tR
(PER CONTROL INPUT)
V
tREC
RECOGNIZED
CC
VALID
Max
M48Z08, M48Z18
0.8
0.4
±1
±1
80
3
3
+ 0.3
AI00606
Unit
mA
mA
mA
µA
µA
V
V
V
V
CC

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