MT48LC32M8A2P-75 IT:D TR Micron Technology Inc, MT48LC32M8A2P-75 IT:D TR Datasheet - Page 73

IC SDRAM 256MBIT 133MHZ 54TSOP

MT48LC32M8A2P-75 IT:D TR

Manufacturer Part Number
MT48LC32M8A2P-75 IT:D TR
Description
IC SDRAM 256MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC32M8A2P-75 IT:D TR

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (32M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 42: READ Without Auto Precharge
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Command
BA0, BA1
Address
DQM
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
Bank
Row
Row
t CMH
t AH
t AH
t AH
t CKH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
1. For this example, BL = 4, CL = 2, and the READ burst is followed by a manual PRECHARGE.
Disable auto precharge
t CL
t CMS
Column m
T2
Bank
READ
t CMH
t CH
CL = 2
T3
NOP
t LZ
t AC
73
T4
NOP
D
OUT
t OH
t AC
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T5
D
NOP
OUT
t OH
t AC
PRECHARGE
Single bank
256Mb: x4, x8, x16 SDRAM
All banks
Bank(s)
T6
D
OUT
t OH
t RP
PRECHARGE Operation
t AC
© 1999 Micron Technology, Inc. All rights reserved.
T7
NOP
D
OUT
t OH
t HZ
Don’t Care
T8
ACTIVE
Row
Bank
Row
Undefined

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