CYD09S18V18-167BBXC Cypress Semiconductor Corp, CYD09S18V18-167BBXC Datasheet - Page 14

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CYD09S18V18-167BBXC

Manufacturer Part Number
CYD09S18V18-167BBXC
Description
IC SRAM 9MBIT 167MHZ 256LFBGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYD09S18V18-167BBXC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
9M (512K x 18)
Speed
167MHz
Interface
Parallel
Voltage - Supply
1.42 V ~ 1.58 V, 1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
256-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CYD09S18V18-167BBXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Part Number:
CYD09S18V18-167BBXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Table 7. Burst Counter and Mask Register Control Operations
The burst counter and mask register control operation for any port follows.
Notes
Document Number: 38-06082 Rev. *J
28. “X” = Don’t Care, “H” = HIGH, “L” = LOW.
29. Counter operation and mask register operation is independent of chip enables.
C
X
MRST
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
CNTRST CNT/MSK CNTEN ADS RET
X
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
X
X
X
L
L
L
L
L
H
H
H
H
H
H
H
X
X
X
L
L
L
L
L
L
H
H
H
H
H
X
X
X
X
X
L
L
X
L
L
L
Master reset
Counter reset
Mask reset
Counter load for burst/
external address load
for non-burst
Mask load
Retransmit
Counter increment
Counter hold
Counter readback
Mask readback
Busy address
readback
Reserved
Reserved
Reserved
Reserved
Reserved
Operation
[28, 29]
Reset address counter to all 0s, mask register
to all 1s, and busy address to all 0s.
Reset counter and mirror unmasked portion to
all 0s.
Reset mask register to all 1s.
Load burst counter and mirror with external
address value presented on address lines.
Load mask register with value presented on
the address lines.
Load counter with value in the mirror register.
Internally increment address counter value.
Constantly hold the address value for multiple
clock cycles.
Read out counter internal value on address
lines.
Read out mask register value on address
lines.
Read out first busy address after last busy
address readback.
Description
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