C8051F509-IMR Silicon Labs, C8051F509-IMR Datasheet - Page 97

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C8051F509-IMR

Manufacturer Part Number
C8051F509-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 64 kB 4 kB SPI UART I2C
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F509-IMR

Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
12. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization is shown in
Figure 12.1
0x7FFF
0xFBFF
0x0000
0xFC00
0x0000
PROGRAM/DATA MEMORY
C8051F504/5/6/7-F510/1
Programmable in 512
Programmable in 512
C8051F500/1/2/3/8/9
(FLASH)
32 kB FLASH
Byte Sectors)
64 kB FLASH
Byte Sectors)
RESERVED
(In-System
(In-System
Figure 12.1. C8051F50x/F51x Memory Map
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.2
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
0xFFFF
0x0FFF
Registers
0x1000
0x0000
Only)
DATA MEMORY (RAM)
from 0x0000 to 0x0FFF,
wrapped on 4096-byte
Same 4096 bytes as
MOVX instruction)
(accessable using
C8051F50x/F51x
4K Bytes
boundaries
XRAM
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
97

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