IS42S16100E-7TL ISSI, Integrated Silicon Solution Inc, IS42S16100E-7TL Datasheet - Page 6

IC SDRAM 16MBIT 143MHZ 50TSOP

IS42S16100E-7TL

Manufacturer Part Number
IS42S16100E-7TL
Description
IC SDRAM 16MBIT 143MHZ 50TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr
Datasheets

Specifications of IS42S16100E-7TL

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
16M (1M x 16)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
50-TSOPII
Organization
1Mx16
Density
16Mb
Address Bus
12b
Access Time (max)
6/5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
130mA
Pin Count
50
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1071
IS42S16100E-7TL

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IS42S16100E, IC42S16100E
DC ELECTRICAL CHARACTERISTICS
Notes:
1. These are the values at the minimum cycle time. Since the currents are transient, these values decrease as the cycle time in-
2. Icc
6
Symbol Parameter
i
i
V
V
i
i
I
i
I
i
i
i
il
ol
cc1
cc2p
cc2ps
cc3N
cc3Ns
cc4
cc5
cc6
oh
ol
creases. Also note that a bypass capacitor of at least 0.01 µF should be inserted between V
to suppress power supply voltage noise (voltage drops) due to these transient currents.
1
and Icc
Input Leakage Current
Output Leakage Current
Output High Voltage Level i
Output Low Voltage Level i
Operating Current
Precharge Standby Current CKE ≤ V
(In Power-Down Mode)
Active Standby Current
(In Non Power-Down Mode)
Operating Current
(In Burst Mode)
Auto-Refresh Current
Self-Refresh Current
4
depend on the output load. The maximum values for Icc
(1)
(1,2)
Test Condition
0V ≤ V
the tested pin at 0V
Output is disabled, 0V ≤ V
One Bank Operation, CAS latency = 3 Com.
Burst Length=1
t
I
CKE ≥ V
t
I
t
CKE ≤ 0.2V
out
out
rc
out
ck
out
rc
≥ t
= t
= t
= –2 mA
= +2 mA
= 0mA
= 0mA
rc
ck
rc
iN
il
ih
≤ Vdd, with pins other than
(min.)
(
(
miN
miN
(
(Recommended Operation Conditions unless otherwise noted.)
(
miN
max
)
)
)
)
t
t
t
t
CAS latency = 3 Com.
CAS latency = 2 Com.
CAS latency = 3 Com.
CAS latency = 2 Com.
ck
ck
ck
ck
out
= t
= ∞
= t
= ∞
1
Integrated Silicon Solution, Inc. — www.issi.com
and Icc
ck
ck
≤ Vdd
(
(
miN
miN
4
)
)
are obtained with the output open state.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Com.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Ind.
Speed
dd
-5
-6
-7
-6
-7
-5
-6
-6
-7
-7
-5
-6
-6
-7
-7
-5
-6
-6
-7
-7
-5
-6
-6
-7
-7
and GND for each memory chip
Min.
2.4
–5
–5
Max.
170
160
140
170
160
170
150
170
130
150
170
150
170
130
150
120
100
110
120
100
110
0.4
40
30
30
70
90
70
90
5
5
3
4
2
2
Unit
01/22/08
mA
mA
mA
mA
mA
mA
mA
mA
µA
µA
Rev. C
V
V

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