BR24L64F-WE2 Rohm Semiconductor, BR24L64F-WE2 Datasheet - Page 26

IC EEPROM 64KBIT 400KHZ 8SOP

BR24L64F-WE2

Manufacturer Part Number
BR24L64F-WE2
Description
IC EEPROM 64KBIT 400KHZ 8SOP
Manufacturer
Rohm Semiconductor
Datasheets

Specifications of BR24L64F-WE2

Memory Size
64K (8K x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOP
Clock Frequency
400kHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Organization
8 Kbit x 8
Interface Type
I2C
Maximum Clock Frequency
0.1 MHz
Access Time
3500 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V, 5.5 V
Memory Configuration
8K X 8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
BR24L64F-WE2
BR24L64F-WE2TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BR24L64F-WE2
Manufacturer:
ROMH
Quantity:
2 296
Part Number:
BR24L64F-WE2
Manufacturer:
ROHM
Quantity:
1 300
Part Number:
BR24L64F-WE2
Manufacturer:
ROHM
Quantity:
1 324
Part Number:
BR24L64F-WE2
Manufacturer:
ROHM
Quantity:
1 455
Part Number:
BR24L64F-WE2
Manufacturer:
ROHM
Quantity:
1 750
Part Number:
BR24L64F-WE2
Manufacturer:
ROHM
Quantity:
1 797
Part Number:
BR24L64F-WE2
Manufacturer:
ROHM/罗姆
Quantity:
20 000
●Software reset
●Acknowledge polling
Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset has
several kinds, and 3 kids of them are shown in the figure below. (Refer to Fig.45(a), Fig.45(b), Fig.45(c).) In dummy clock
input area, release the SDA bus ('H' by pull up). In dummy clock area, ACK output and read data '0' (both 'L' level) may be
output from EEPROM, therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to instantaneous
power failure of system power source or influence upon devices.
During internal write, all input commands are ignored, therefore ACK is not sent back. During internal automatic write
execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then it
means end of write action, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next command
can be executed without waiting for tWR = 5ms.
When to write continuously, R/W = 0, when to carry out current read cycle after write, slave address R/W = 1 is sent, and if
ACK signal sends back 'L', then execute word address input and data so forth.
SCL
SCL
SDA
SDA
SCL
SDA
S
T
A
R
T
Fig.45-(b) The case of START+9 Dummy clock + START + command input
First write command
Fig.45-(a) The case of 14 Dummy clock + START + START+ command inpu
S
T
A
R
T
Write command
Slave
address
Start
t
WR
Fig.46 Case to continuously write by acknowledge polling
1
1
Fig.45-(c) START × 9 + command input
A
C
K
H
2
1
2
Dummy clock×14
Dummy clock×9
S
T
O
P
Start×9
2
3
S
T
A
R
T
13
Slave
address
S
T
A
R
T
Slave
address
14
8
7
Second write command
A
C
K
L
After
write, ACK=LOW is sent back,
so input next word address and
data in succession.
Start×2
9
A
C
K
H
8
address
t
Word
26/32
WR
Start
During internal write,
ACK = HIGH is sent back.
completion
9
S
T
A
R
T
Slave
address
A
C
K
L
Data
of
A
C
K
H
* Start command from START input.
Normal command
Normal command
Normal command
Normal command
Normal command
Normal command
A
C
K
L
internal
S
T
O
P

Related parts for BR24L64F-WE2