XRT83L314ES Exar, XRT83L314ES Datasheet - Page 75

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XRT83L314ES

Manufacturer Part Number
XRT83L314ES
Description
LIN Transceivers
Manufacturer
Exar
Datasheet

Specifications of XRT83L314ES

Product Category
LIN Transceivers
Rohs
yes
B
D5
D4
D3
D2
D1
D0
IT
TCLKCNL
ALLT1/E1
CLKSEL3
CLKSEL2
CLKSEL1
CLKSEL0
N
AME
T1/E1 Control
This bit is used to reduce system noise and power consumption. If
the ALL T1/E1 mode is enabled, all output clock references
(excluding the 8kHzout in E1 mode only) are internally shut off. By
default, the ALL T1/E1 mode is enabled.
0 = Enabled (reduce clock switching and power consumption)
1 = Disabled (all clock references are available)
Transmit Clock Control
This bit is used to select the transmit output activity at TTIP/TRING
when TCLK is either pulled "Low", pulled "High", or missing.
0 = Transmit All Zeros
1 = TAOS (Transmit All Ones)
Clock Input Select
CLKSEL[3:0] is used to select the input clock source used as the
internal timing reference.
0000 = 2.048 MHz
0001 = 1.544 MHz
0010 = 8 kHz
0011 = 16 kHz
0100 = 56 kHz
0101 = 64 kHz
0110 = 128 kHz
0111 = 256 kHz
1000 = 4.096 Mhz
1001 = 3.088 Mhz
1010 = 8.192 Mhz
1011 = 6.176 Mhz
1100 = 16.384 Mhz
1101 = 12.352 Mhz
1110 = 2.048 Mhz
1111 = 1.544 Mhz
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
G
LOBAL
R
F
UNCTION
EGISTER
71
(0
X
E9
H
)
Register
Type
R/W
R/W
R/W
XRT83L314
(HW reset)
Default
REV. 1.0.0
Value
0
0
0
0
0
0

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