XRT83L314ES Exar, XRT83L314ES Datasheet
XRT83L314ES
Specifications of XRT83L314ES
Related parts for XRT83L314ES
XRT83L314ES Summary of contents
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... The LIU features are programmed through a standard microprocessor interface. EXAR’s LIU has patented high impedance circuits that allow the transmitter outputs and receiver inputs to be high impedance when experiencing a power failure or when the LIU is powered off. Key ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 FEATURES Fully integrated 14-Channel short haul and long haul transceivers for T1/J1 (1.544MHz) and E1 (2.048MHz) applications. T1/E1/J1 short haul, long haul, and clock rate are per port selectable through software ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT PIN OUT OF THE XRT83L314 3 XRT83L314 REV. 1.0.0 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 GENERAL DESCRIPTION.............................................................................................................. 1 APPLICATIONS .......................................................................................................................................................... XRT83L314 .................................................................................................................................... 1 IGURE LOCK IAGRAM OF THE ..................................................................................................................................................................... 2 FEATURES PRODUCT ORDERING INFORMATION ..................................................................................................2 PIN OUT OF THE XRT83L314........................................................................................................ 3 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT F 17 IGURE UAL AIL ODE ITH A IXED 2.10 RXMUTE (RECEIVER LOS WITH DATA MUTING) ..................................................................................... IGURE IMPLIFIED LOCK IAGRAM OF THE ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0 IGURE IMPLIFIED LOCK IAGRAM OF A 5.0 MICROPROCESSOR INTERFACE BLOCK ........................................................................................ ABLE ELECTING THE ICROPROCESSOR F 41 IGURE IMPLIFIED ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT PIN DESCRIPTIONS MICROPROCESSOR AME IN YPE CS A22 I ALE_TS C19 I WR_R/W A20 I RD_WE D18 I RDY_TA AA3 O INT B3 O PCLK AB2 I ADDR10 A23 I ADDR9 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 MICROPROCESSOR AME IN YPE DATA7 AA4 I/O DATA6 AB3 DATA5 AC3 DATA4 AA5 DATA3 Y6 DATA2 AB4 DATA1 AC4 DATA0 AB5 PTS2 AC23 I PTS1 AB22 PTS0 AA21 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT RECEIVER SECTION AME IN YPE RLOS AB1 O RCLK13 AB14 O RCLK12 Y22 RCLK11 R22 RCLK10 P22 RCLK9 G22 RCLK8 F22 RCLK7 B14 RCLK6 B9 RCLK5 F2 RCLK4 G2 RCLK3 P2 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 RECEIVER SECTION AME IN YPE RNEG13 AA14 O RNEG12 Y21 RNEG11 P21 RNEG10 N21 RNEG9 H21 RNEG8 G21 RNEG7 C14 RNEG6 C10 RNEG5 F3 RNEG4 G3 RNEG3 N3 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT TRANSMITTER SECTION AME IN YPE TxON AC20 I DMO Y4 O TCLK13 Y16 I TCLK12 Y17 TCLK11 AC18 TCLK10 D16 TCLK9 C17 TCLK8 A19 TCLK7 B16 TCLK6 D7 TCLK5 A3 TCLK4 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 TRANSMITTER SECTION AME IN YPE TNEG13 AC17 I TNEG12 AC19 TNEG11 AA17 TNEG10 B17 TNEG9 B18 TNEG8 C18 TNEG7 C16 TNEG6 C7 TNEG5 D5 TNEG4 C5 TNEG3 C6 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT CONTROL FUNCTION AME IN YPE TEST D4 I ICT A2 I CLOCK SECTION AME IN YPE MCLKin A6 I 8kHzOUT D8 O MCLKE1out A5 O MCLKE1Nout A4 O ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 POWER AND GROUND AME IN YPE TVDD13 AB13 PWR TVDD12 V21 TVDD11 T21 TVDD10 N22 TVDD9 H22 TVDD8 E21 TVDD7 B13 TVDD6 B10 TVDD5 D2 TVDD4 J3 TVDD3 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT POWER AND GROUND AME IN YPE DVDD_DRV C21 PWR DVDD_DRV AC2 DVDD_DRV K3 DVDD_DRV D9 DVDD_DRV AA16 DVDD_DRV U22 DVDD_PRE C3 DVDD_PRE Y5 DVDD_PRE D20 DVDD_PRE Y20 DVDD_UP AA15 AVDD_BIAS K4 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 POWER AND GROUND AME IN YPE DGND L2 GND DGND T4 DGND C12 DGND Y12 DGND U20 DGND L23 DGND_DRV B2 GND DGND_DRV U3 DGND_DRV A16 DGND_DRV AA8 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 1.0 CLOCK SYNTHESIZER In system design, fewer clocks on the network card could reduce noise and interference. Common clock references such as 8kHz are readily available to network designers. Network cards that support both ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0 IGURE IMPLIFIED LOCK IAGRAM OF THE Input Clock 1.1 ALL T1/E1 Mode To reduce system noise and power consumption, the XRT83L314 offers an ALL T1/E1 mode. ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 2.1 Line Termination (RTIP/RRING) 2.1.1 CASE 1: Internal Termination The input stage of the receive path accepts standard T1/E1/J1 twisted pair or E1 coaxial cable inputs through RTIP and RRING. The physical interface is ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 2.1.2 CASE 2: Internal Termination With One External Fixed Resistor for All Modes Along with the internal termination, a high precision external fixed resistor can be used to optimize the return ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 2.2 Equalizer Control The main objective of the equalizer is to amplify an input attenuated signal to a pre-determined amplitude that is acceptable to the peak detector circuit. Using feedback from the peak detector, ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 2.4 Equalizer Attenuation Flag The ability to detect the amount of cable loss on the receiver inputs is enhanced by having the ability to generate an interrupt by programming a pre-determined ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 2.6 Clock and Data Recovery The receive clock (RCLK) is recovered by the clock and data recovery circuitry. An internal PLL locks on the incoming data stream and outputs a clock that’s in phase ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0 ABLE P ARAMETER RCLK Duty Cycle Receive Data Setup Time Receive Data Hold Time RCLK to Data Delay RCLK Rise Time (10% to 90%) with 25pF Loading RCLK ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 2.6.2 Interference Margin The interference margin for the XRT83L314 will be added when the first revision of silicon arrives. The test configuration for measuring the interference margin is shown in Figure 12. F 12. ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0 mode, RLOS is declared if an incoming signal has no transitions over a period of 175 +/-75 contiguous pulse intervals. However, the XRT83L314 LIU has a built in analog ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT seconds. If the network loop code detection is programmed for automatic loop code, the LIU is configured to detect a Loop-Up code Loop-Up code is detected for more than 5 seconds, the ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 2.6.3.5 FLSD (FIFO Limit Status Detection) The purpose of the FIFO limit status is to indicate when the Read and Write FIFO pointers are within a pre- determined range (over-flow or ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 2.9 RPOS/RNEG/RCLK The digital output data can be programmed to either single rail or dual rail formats. Figure timing diagram of a repeating "0011" pattern in single-rail mode. Figure 17 is ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 3.0 TRANSMIT PATH LINE INTERFACE The transmit path of the XRT83L314 LIU consists of 14 independent T1/E1/J1 transmitters. The following section describes the complete transmit path from TCLK/TPOS/TNEG inputs to TTIP/TRING ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT ABLE P ARAMETER TCLK Duty Cycle Transmit Data Setup Time Transmit Data Hold Time TCLK Rise Time (10% to 90%) TCLK Fall Time (90 VDD=3.3V ±5%, T ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 3.3 Transmit Jitter Attenuator The XRT83L314 LIU is ideal for multiplexer or mapper applications where the network data crosses multiple timing domains. As the higher data rates are de-multiplexed down to ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 3.5.1 ATAOS (Automatic Transmit All Ones) If ATAOS is selected by programming the appropriate global register, an AMI all ones signal will be transmitted for each channel that experiences an RLOS condition. If RLOS ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 3.5.4 QRSS Generation The XRT83L314 can transmit a QRSS random sequence to a remote location from TTIP/TRING. The polynomial is shown in Table 11. T ABLE R P ANDOM ATTERN QRSS ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT F 27 IGURE ONG AUL INE UILD F 28 IGURE ONG AUL INE UILD O - WITH D TTENUATION O -22 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 3.6.2 T1 Short Haul Line Build Out (LBO) The short haul transmitter output pulses are generated using a 7-Bit internal DAC (6-Bit plus the MSB sign bit). The line build out ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT the interrupt pin to go "Low". Once the status register is read, the interrupt pin will return "High" and the status register will be reset (RUR). 3.8 Line Termination (TTIP/TRING) The output stage of ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 4.0 T1/E1 APPLICATIONS This applications section describes common T1/E1 system considerations along with references to application notes available for reference where applicable. 4.1 Loopback Diagnostics The XRT83L314 supports several loopback modes ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 4.1.3 Digital Loopback With digital loopback activated, the transmit input data at TCLK/TPOS/TNEG is looped back to the receive output data at RCLK/RPOS/RNEG. The digital loopback mode includes the Transmit JA (if enabled). The ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 4.2 84-Channel T1/E1 Multiplexer/Mapper Applications The XRT83L314 has the capability of providing the necessary chip selects for multiple 14-channel LIU devices. The LIU is responsible for selecting itself ...
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... System designers can achieve this by implementing common redundancy schemes with the XRT83L314 LIU. EXAR offers features that are tailored to redundancy applications while reducing the number of components and providing system designers with solid reference designs. ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 card to internal impedance, then the primary card to "High" impedance. See Figure 37. for a simplified block diagram of the receive section for a 1:1 redundancy scheme. F 37. S ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 4.3.5 Transmit Interface with N+1 Redundancy For N+1 redundancy, the transmitters on all cards should be programmed for internal impedance. The transmitters on the backup card do not have to be tri-stated. To swap ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 4.3.6 Receive Interface with N+1 Redundancy For N+1 redundancy, the receivers on the primary cards should be programmed for internal impedance. The receivers on the backup card should be programmed for ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 4.4 Power Failure Protection For 1:1 or 1+1 line card redundancy in T1/E1 applications, power failure could cause a line card to change the characteristics of the line impedance, causing a degradation in system ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 5.0 MICROPROCESSOR INTERFACE BLOCK The Microprocessor Interface section supports communication between the local microprocessor (µP) and the LIU. The XRT83L314 supports an Intel asynchronous interface, Motorola 68K asynchronous, and a Motorola ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 5 ICROPROCESSOR NTERFACE The LIU may be configured into different operating modes and have its performance monitored by software through a standard microprocessor using data, address and control signals. These ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 17: M ABLE OTOROLA XRT83L314 M OTOROLA T YPE AME QUIVALENT IN ALE_TS TS I WR_R/W R/W I RD_WE Pin OE I ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 5 I/O A NTEL ODE ROGRAMMED If the LIU is interfaced to an Intel type µP, then it should be configured to operate in the Intel mode. Intel type Read and ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 F 42. I µ IGURE NTEL NTERFACE IGNALS READ OPERATION ALE = ADDR[10:0] Valid Address CS DATA[7: RDY T 18: I ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT 5 OTOROLA ODE ROGRAMMED If the LIU is interfaced to a Motorola type µP, it should be configured to operate in the Motorola mode. Motorola type programmed I/O Read and Write ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 F 43. M µP I IGURE OTOROLA NTERFACE READ OPERATION TS uPCLK ADDR[10:0] Valid Address DATA[7: R ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT F 44. M 68K µP I IGURE OTOROLA NTERFACE READ OPERATION _TS ALE t 0 Valid Address ADDR[10: DATA[7: _WE RD _R _DTACK RDY T 20: ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 21: M ABLE R EGISTER DDRESS EX N UMBER 0x00 - 0x0F Channel 0 Control Registers 0x10 - 0x1F Channel 1 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 22: M ABLE R ADDR YPE 7 0x07 RO Reserved FLSDET 8 0x08 R/W Reserved 1SEG6 9 0x09 R/W Reserved 2SEG6 10 0x0A R/W Reserved 3SEG6 11 0x0B R/W ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 24: M ABLE AME D7 QRSS/ QRSS/PRBS Select Bits PRBS These bits are used to select between QRSS and PRBS QRSS 1 = PRBS D6 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 25: E ABLE QUALIZER EQC[4:0] T1/ ODE ECEIVE ENSITIVITY 0x0Dh T1 Short Haul/15dB 0x0Eh T1 Gain Mode/29dB 0x0Fh T1 Gain Mode/29dB 0x10h T1 Gain Mode/29dB 0x11h T1 Gain Mode/29dB 0x12h ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 26: M ABLE AME D7 RxTSEL Receive Termination Select Upon power up, the receiver is in "High" impedance. RxTSEL is used to switch between the internal termination ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 27: M ABLE ICROPROCESSOR AME D7 INVQRSS QRSS inversion INVQRSS is used to invert the transmit QRSS pattern set by the TxTEST[2:0] bits. By default, INVQRSS is disabled and the ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 28: M ABLE AME D7 NLCDE1 Network Loop Code Detection Enable D6 NLCDE0 NLCDE[1:0] are used to select the loop code detection Disabled 01 = ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 29: M ABLE ICROPROCESSOR AME D7 EQFLAGE Equalizer Attenuation Flag Enable 0 = Masks the EQFLAG function 1 = Enables Interrupt Generation D6 DMOIE Digital Monitor Output Interrupt Enable 0 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0 The GIE bit in the global register 0xE0h must be set to "1" in addition to the individual register bits to enable the OTE interrupt pin. T 30: M ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT N : The GIE bit in the global register 0xE0h must be set to "1" in addition to the individual register bits to enable the OTE interrupt pin. T 30: M ABLE B N ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 31: M ABLE AME D4 LCV/OFIS Line Code Violation / Counter Overflow Status change 1 = Change in status occurred D3 NLCDIS Network Loop ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 33: M ABLE ICROPROCESSOR AME D7 Reserved This Register Bit is Not Used D6 1SEG6 Arbitrary Pulse Generation D5 1SEG5 The transmit output pulse is divided into 8 individual segments. ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 36: M ABLE AME D7 Reserved This Register Bit is Not Used D[6:0] 4SEG[6:0] Segment Number Four, Same Description as Register 0x08h T 37: M ABLE B ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 40: M ABLE ICROPROCESSOR AME D7 Reserved This Register Bit is Not Used D[6:0] 8SEG[6:0] Segment Number Eight, Same Description as Register 0x08h T 41: M ABLE ICROPROCESSOR B N ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 41: M ABLE AME D1 GIE Global Interrupt Enable The global interrupt enable is used to enable/disable all interrupt activity for all 14 channels. This bit must ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT AME D1 EXLOS Extended Loss of Zeros The number of zeros required to declare a Digital Loss of Signal is extended to 4,096 Normal Operation 1 = Enables the ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0 AME D3 SL1 Slicer Level Select D2 SL0 68% D1 EQG1 Equalizer Gain Control D0 EQG0 00 ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 46: M ABLE ICROPROCESSOR AME D7 LCV/OFLW Line Code Violation / Counter Overflow Monitor Select This bit is used to select the monitoring activity between the LCV and the counter ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 47: M ABLE AME D7 Reserved This Register Bit is Not Used D6 Reserved This Register Bit is Not Used D5 Reserved This Register Bit is Not ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 48: M ABLE ICROPROCESSOR AME D7 Reserved This Register Bit is Not Used D6 Reserved This Register Bit is Not Used D5 Reserved This Register Bit is Not Used D4 ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 CLOCK SELECT REGISTER The input clock source is used to generate all the necessary clock references internally to the LIU. The microprocessor timing is derived from a PLL output which is ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT AME D5 ALLT1/E1 T1/E1 Control This bit is used to reduce system noise and power consumption. If the ALL T1/E1 mode is enabled, all output clock references (excluding the 8kHzout in ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 51: M ABLE AME D7 GCHIS7 Global Channel Interrupt Status for Channel interrupt activity from channel Interrupt was generated from ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT AME D4 GCHIS12 Global Channel Interrupt Status for Channel interrupt activity from channel Interrupt was generated from channel 12 D3 GCHIS11 Global Channel Interrupt ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 T 54: M ABLE AME D7 Device "ID" The device "ID" of the XRT83L314 long haul LIU is 0xFFh. Along with the revision "ID", the device "ID" is ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT ELECTRICAL CHARACTERISTICS Storage Temperature Operating Temperature Supply Voltage Vin T 57 ABLE VDD=3.3V ±5 ARAMETER Power Supply Voltage Input High Voltage Input Low Voltage Output High Voltage IOH=2.0mA Output Low ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.0 VDD=3.3V ±5 UPPLY M I ODE MPEDANCE V OLTAGE E1 3. 3.3V 120 T1 3.3V 100 - 3. 60 ABLE VDD=3.3V ±5%, T ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT T 60 ABLE VDD=3.3V ±5 ARAMETER Jitter Attenuator Corner Fre- quency JABW = 0 JABW = 1 Return Loss 51kHz - 102kHz 102kHz - 2048kHz 2048kHz - 3072kHz T 61: ...
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XRT83L314 14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT REV. 1.0 ABLE VDD=3.3V ±5 ARAMETER AMI Output Pulse Amplitude 75 120 Output Pulse Width Output Pulse Width Ratio Output Pulse Amplitude Ratio Jitter Added by the ...
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T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT ORDERING INFORMATION P N RODUCT UMBER XRT83L314IB PACKAGE DIMENSIONS (DIE DOWN) D SEATING PLANE ACKAGE 304 LEAD TBGA ...
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... Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. ...