C8051F303-GSR Silicon Labs, C8051F303-GSR Datasheet - Page 57

• Manufacturer Part Number: C8051F303-GSR
• Description: 8-bit Microcontrollers - MCU 8KB 14Pin MCU
• Manufacturer: Silicon Labs

Specifications of C8051F303-GSR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

8.
The MCU system controller core is the CIP-51 microcontroller. The CIP-51 is fully compatible with the
MCS-51™ instruction set; standard 803x/805x assemblers and compilers can be used to develop soft-
ware. The MCU family has a superset of all the peripherals included with a standard 8051. Included are
three 16-bit counter/timers (see description in
in
tion
debug hardware (see description in
tems providing a complete data acquisition or control-system solution in a single integrated circuit.
The CIP-51 Microcontroller core implements the standard 8051 organization and peripherals as well as
additional custom peripherals and functions to extend its capability (see Figure 8.1 for a block diagram).
The CIP-51 includes the following features:
Section
8.2.6), and one byte-wide I/O Port (see description in
- Fully Compatible with MCS-51 Instruction Set
- 25 MIPS Peak Throughput with 25 MHz Clock
- 0 to 25 MHz Clock Frequency
- 256 Bytes of Internal RAM
- Byte-Wide I/O Port
CIP-51 Microcontroller
14), 256 bytes of internal RAM, 128 byte Special Function Register (SFR) address space
RESET
CLOCK
STOP
IDLE
ACCUMULATOR
PROGRAM COUNTER (PC)
Figure 8.1. CIP-51 Block Diagram
CONTROL
PSW
PRGM. ADDRESS REG.
LOGIC
POWER CONTROL
PC INCREMENTER
DATA POINTER
Section
REGISTER
BUFFER
TMP1
PIPELINE
17), and interfaces directly with the analog and digital subsys-
ALU
Section
TMP2
DATA BUS
DATA BUS
Rev. 2.9
D8
D8
D8
15), an enhanced full-duplex UART (see description
A16
D8
D8
D8
D8
B REGISTER
Section
- Reset Input
- Extended Interrupt Handler
- Power Management Modes
- On-chip Debug Logic
- Program and Data Memory Security
REGISTER
ADDRESS
INTERFACE
INTERFACE
INTERRUPT
INTERFACE
MEMORY
SRAM
SFR
BUS
C8051F300/1/2/3/4/5
12). The CIP-51 also includes on-chip
MEM_WRITE_DATA
SFR_WRITE_DATA
MEM_READ_DATA
STACK POINTER
(256 X 8)
SFR_READ_DATA
SRAM
MEM_CONTROL
EMULATION_IRQ
MEM_ADDRESS
SFR_ADDRESS
SFR_CONTROL
SYSTEM_IRQs
(Sec-
57