MAX3891ECB+TD Maxim Integrated, MAX3891ECB+TD Datasheet - Page 3

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MAX3891ECB+TD

Manufacturer Part Number
MAX3891ECB+TD
Description
Serializers & Deserializers - Serdes Integrated Circuits (ICs)
Manufacturer
Maxim Integrated
Type
Serializerr
Datasheet

Specifications of MAX3891ECB+TD

Rohs
yes
Data Rate
2.5 Gbit/s
Input Type
LVPECL
Output Type
LVPECL
Number Of Inputs
16
Number Of Outputs
1
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TQFP-64 EP
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Factory Pack Quantity
750
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
AC ELECTRICAL CHARACTERISTICS
(V
are at T
(V
Note 1: AC characteristics are guaranteed by design and characterization.
Note 2: Setup and hold times are relative to the rising edge of PCLKI+, measured by applying a 155.52MHz differential parallel
Note 3: Setup and hold time measurements assume that the PCLKI and PDI signals are from the same source and have identical
Serial Clock Rate
Parallel Data Setup Time
Parallel Data-Hold Time
PCLKO to PCLKI Skew
Output Jitter Generation
(SCLKO±)
PECL Differential Output (SDO±,
SCLKO±) Rise/Fall Time
Parallel Input Clock Rate
Reference Clock Input (RCLK±)
Rise/Fall Time
Parallel Clock Output (PCLKO±)
Rise/Fall Time
Serial-Clock Output (SCLKO±)
to Serial-Data Output (SDO±)
Delay
CC
CC
200
180
160
140
120
100
= +3.0V to +3.6V, PECL loads = 50Ω ±1% to (V
= +3.3V
A
-50
clock with rise/fall time = 1ns (20% to 80%). See Figure 1.
common-mode voltages, swings, and slew rates.
= +25°C and V
SUPPLY CURRENT vs. TEMPERATURE
PECL OUTPUTS UNTERMINATED
PARAMETER
-25
,
T
16:1 Serializer, 3.3V, 2.5Gbps, SDH/SONET,
A
= +25°C, unless otherwise noted.)
TEMPERATURE (°C)
0
with Clock Synthesis and LVPECL Inputs
_______________________________________________________________________________________
CC
25
= +3.3V, unless otherwise noted.) (Note 1)
50
75
SYMBOL
t
SCLK-SD
t
f
f
SKEW
t
PCLKI
t
t
SCLK
R
R
R
t
100
t
SU
H
, t
, t
, t
F
F
F
(Notes 2, 3)
(Notes 2, 3)
Figure 1
Jitter bandwidth = 12kHz to 20MHz
20% to 80%
20% to 80%, f = 155.52MHz
20% to 80%
SCLKO rising edge to SDO edge
CC
SERIAL-DATA OUTPUT EYE DIAGRAM
- 2V), CML loads = 50Ω ±1% to V
CONDITIONS
100ps/div
Typical Operating Characteristics
MAX3891 toc02
CC
, T
A
110
300
700
TOTAL WIDEBAND RMS JITTER = 2.059ps,
PEAK-TO-PEAK JITTER = 16.70ps
MIN
f
0
= -40°C to +85°C. Typical values
RCLK
SERIAL-DATA OUTPUT JITTER
= 155.52MHz
155.52
2.488
TYP
5000ps/div
MAX
+4.0
290
120
1.0
1.0
3
MAX3891 toc03
UNITS
ps
GHz
MHz
ps
ps
ns
ps
ns
ns
ps
RMS
3

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