FT121T-R FTDI, FT121T-R Datasheet - Page 9

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FT121T-R

Manufacturer Part Number
FT121T-R
Description
USB Interface IC USB CONTROLLER W/SPI SLAVE IC
Manufacturer
FTDI
Datasheet

Specifications of FT121T-R

Rohs
yes
Product
USB 2.0
Interface Type
SPI, USB
Operating Supply Voltage
4 V to 5.5 V
Operating Supply Current
3.9 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-16
Minimum Operating Temperature
- 40 C
OUT Buffer. Data sent from the USB host controller to FT121 via the USB data OUT endpoint is stored in
the OUT buffer. Data is removed from the OUT buffer to system memory under control of the parallel
interface block.
IN Buffer. Data from system memory is stored in the IN buffer. The USB host controller removes data
from the IN buffer by sending a USB request for data from the device data IN endpoint.
RESET Generator. The integrated Reset Generator cell provides a reliable power-on reset to the device
internal circuitry at power up. The RESET_n input pin allows an external device to reset the FT121.
SPI Controller Block. The SPI slave controller provides control and data interfaces between the external
MCU and internal registers and endpoint buffers. It supports 4-wire (default) or 3-wire SPI operation.
4.2
The FT121 interrupt pin (INT_n) can be programmed to generate an interrupt in different modes. The
interrupt source can be any bit in the Interrupt Register, or receiving SOF packet, or both. The interrupt
modes are selectable by two register bits, one is the SOF-only Interrupt Mode bit (bit 7 of Clock Division
Factor register), and the other is the Interrupt Pin Mode bit (bit 5 of Interrupt Configuration register).
Table 4-1 Interrupt modes
4.3
The SPI slave interface supports 4-wire (default) and 3-wire operation. In 4-wire operation the SPI
master will drive data on MOSI pin and the SPI slave will drive data on MISO pin. In 3-wire operation
both SPI master and SPI slave share the same data pin (MOSI pin becomes bi-directional pin). Upon
power-on or hardware reset, the FT121 SPI slave interface is in 4-wire mode. The 3-wire operation is
enabled when a Set 3-wire command is issued to FT121.
The SPI protocol will follow a command + data format where a command is transmitted after SS_n is
asserted and each subsequent byte will be a data byte. When all data bytes for this command are
completed the SS_n is de-asserted. This can be seen in Figure 4-1.
Interrupt
mode
Interrupt Modes
SPI Slave Interface
0
1
2
Bit SOF-only
Interrupt
Copyright © 2012 Future Technology Devices International Limited
Mode
0
0
1
FT121 ENHANCED USB DEVICE CONTROLLER WITH SPI SLAVE IC
Bit Interrupt
Pin Mode
0
1
X
Any bit in Interrupt register and SOF
Any bit in Interrupt register
Interrupt source
SOF only
Document No.: FT_000648
Clearance No.: FTDI#
Datasheet Version 1.0
312
9

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