FT121T-R FTDI, FT121T-R Datasheet - Page 43

• Manufacturer Part Number: FT121T-R
• Description: USB Interface IC USB CONTROLLER W/SPI SLAVE IC
• Manufacturer: FTDI

Specifications of FT121T-R

• Rohs: yes
• Product: USB 2.0
• Interface Type: SPI, USB
• Operating Supply Voltage: 4 V to 5.5 V
• Operating Supply Current: 3.9 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-16
• Minimum Operating Temperature: - 40 C

Document No.: FT_000648
FT121 ENHANCED USB DEVICE CONTROLLER WITH SPI SLAVE IC
Datasheet Version 1.0
312
Clearance No.: FTDI#
Appendix A – References
Useful Application Notes
http://www.ftdichip.com/Documents/AppNotes/AN_167_FT1248_Parallel_Serial_Interface_Basics.pdf
http://www.ftdichip.com/Support/Documents/TechnicalNotes/TN_100_USB_VID-PID_Guidelines.pdf
http://www.ftdichip.com/Support/Documents/AppNotes/AN_175_Battery%20Charging%20Over%20USB
%20with%20FTEX%20Devices.pdf
http://www.usb.org/developers/devclass_docs/BCv1.2_011912.zip
Appendix B - List of Figures and Tables
List of Figures
Figure 2-1 FT121 Block Diagram ..................................................................................................... 3
Figure 3-1 TSSOP-16 package schematic symbol .............................................................................. 6
Figure 3-2 QFN-16 package schematic symbol.................................................................................. 6
Figure 4-1 SPI access .................................................................................................................. 10
Figure 4-2 4-wire write operation .................................................................................................. 10
Figure 4-3 4-wire read operation .................................................................................................. 11
Figure 4-4 3-wire write operation .................................................................................................. 11
Figure 4-5 3-wire read operation .................................................................................................. 11
Figure 7-1 FT121 bus powered application ..................................................................................... 32
Figure 7-2 FT121 self powered application ..................................................................................... 32
Figure 8-1 SPI slave timing .......................................................................................................... 36
Figure 9-1 TSSOP-16 Package Dimensions ..................................................................................... 37
Figure 9-2 TSSOP-16 Package Markings ........................................................................................ 38
Figure 9-3 QFN-16 Package Dimensions ........................................................................................ 39
Figure 9-4 QFN-16 Package Markings ............................................................................................ 40
Figure 9-5 FT121 Solder Reflow Profile .......................................................................................... 40
List of Tables
Table 3-1 FT121 Pin Description ..................................................................................................... 7
Table 4-1 Interrupt modes ............................................................................................................. 9
Table 5-1 Endpoint configuration for EP0 and EP1 ........................................................................... 13
Table 5-2 Endpoint configuration for EP2 ....................................................................................... 13
Table 5-3 Example buffer configuration ......................................................................................... 14
Table 5-4 Endpoint Maximum Packet Size ...................................................................................... 15
Table 6-1 FT121 default command set ........................................................................................... 17
Table 6-2 enhanced command set ................................................................................................ 21
Table 6-3 Address Enable Register ................................................................................................ 21
Table 6-4 Endpoint Enable Register ............................................................................................... 21
Table 6-5 Configuration Register (Byte 1) ...................................................................................... 22
Table 6-6 Configuration Register (Byte 2) ...................................................................................... 22
Table 6-7 Interrupt Configuration Register ..................................................................................... 23
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