MAX9258AGCM+ Maxim Integrated, MAX9258AGCM+ Datasheet - Page 43

• Manufacturer Part Number: MAX9258AGCM+
• Description: Serializers & Deserializers - Serdes Prog Serializer / Deserializer
• Manufacturer: Maxim Integrated
• Type: Deserializerr

Specifications of MAX9258AGCM+

• Rohs: yes
• Data Rate: 840 Mbit/s
• Input Type: LVDS
• Output Type: LVCMOS
• Number Of Inputs: 1
• Number Of Outputs: 18
• Operating Supply Voltage: 1.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

Interconnect for LVDS typically has a differential imped-
ance of 100I. Use cables and connectors that have
matched differential impedance to minimize impedance
discontinuities. Twisted-pair and shielded twisted-pair
cables offer superior signal quality compared to ribbon
cable and tend to generate less EMI due to magnetic
field canceling effects. Balanced cables pick up noise
as common mode that is rejected by the LVDS receiver.
ADDRESS
0
1
BITS
7:6
5:4
2:0
7:5
4:0
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3
Fully Programmable Serializer/Deserializer
DEFAULT
Cables and Connectors
11111
101
000
10
11
0
SPREAD
PWIDTH
PAREN
PRATE
SRATE
NAME
with UART/I
Pixel clock frequency range
00 = 5MHz to 10MHz
01 = 10MHz to 20MHz
10 = 20MHz to 40MHz (default)
11 = 40MHz to 70MHz
Serial-data rate range
00 = 60Mbps to 100Mbps
01 = 100Mbps to 200Mbps
10 = 200Mbps to 400Mbps
11 = 400Mbps to 840Mbps (default)
Parity enable
Parallel data width
(includes HSYNC and VSYNC, excludes DCB, INV, and parity bits)
000 = 10
001 = 12
010 = 14
011 = 16
Spread-spectrum setting
For PRATE ranges 00, 01: all spread options possible
For PRATE ranges 10, 11: maximum spread is 2%
000 = Off (default)
001 = 1.5%
010 = 1.75%
011 = 2%
Reserved (set to 11111)
I
to data and clock lines. There are tradeoffs between
power dissipation and speed, and a compromise must
be made in choosing pullup resistor values. Every device
connected to the bus introduces some capacitance even
when device is not in operation. I
rise times to go from low to high (30% to 70%) for fast
mode, which is defined for a date rate up to 400kbps
(see
require ment, choose the pullup resistors so the rise time
t
becomes too slow, the setup and hold times may not be
met and waveforms will not be recognized.
2
R
C requires pullup resistors to provide a logic-high level
= 0.85R
I
MAX9257A/MAX9258A
2
C
specifications for details). To meet the rise time
PULLUP
2
C Control Channel
0 = disabled (default), 1 = enabled
100 = 18
101 = 18 (default)
110 = 18
111 = 18
100 = Off
101 = 3%
110 = 3.5%
111 = 4%
DESCRIPTION
Choosing I2C Pullup Resistors
x C
BUS
MAX9257A Register Table
< 300ns. If the transition time
2
C specifies 300ns