MAX9260GCB/V+TGG4 Maxim Integrated, MAX9260GCB/V+TGG4 Datasheet - Page 11

• Manufacturer Part Number: MAX9260GCB/V+TGG4
• Description: Serializers & Deserializers - Serdes Multimedia Serial Link
• Manufacturer: Maxim Integrated
• Type: Deserializerr

Specifications of MAX9260GCB/V+TGG4

• Rohs: yes
• Data Rate: 2.5 Gbit/s
• Input Type: CML
• Output Type: CMOS/LVCMOS
• Number Of Inputs: 1
• Number Of Outputs: 30
• Operating Supply Voltage: 1.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: TQFP-64 EP
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

The MAX16907 is a constant-frequency, current-mode,
automotive buck converter with an integrated high-side
switch. The device operates with input voltages from
3.5V to 36V and tolerates input transients up to 42V.
During undervoltage events, such as cold-crank condi-
tions, the internal pass device maintains 98% duty cycle.
The switching frequency is resistor programmable from
1MHz to 2.2MHz to allow optimization for efficiency,
noise, and board space. A synchronization input FSYNC
allows the device to synchronize to an external clock
frequency.
During light-load conditions, the device enters skip mode
for high efficiency. The 5V fixed output voltage eliminates
the need for external resistors and reduces the supply
current to 30FA. See the
information.
The device includes two separate supply inputs, SUP
and SUPSW, specified for a wide 3.5V to 36V input
voltage range. V
V
the device is operating with a 3.5V input supply, certain
conditions such as cold crank can cause the voltage at
SUPSW to drop below the programmed output voltage.
As such, the device operates in a high duty-cycle mode
to maintain output regulation.
The device includes a 5V linear regulator, BIAS, that
provides power to the internal circuitry. Connect a 1FF
ceramic capacitor from BIAS to GND.
The device synchronizes to an external clock signal
applied at FSYNC. The signal at FSYNC must have a
10% higher frequency than the internal clock frequency
for proper synchronization.
The device includes an 8.5ms fixed soft-start time for up
to 500FF capacitive load with a 3A resistive load.
The device features a 80ns minimum on-time that ensures
proper operation at 2.2MHz switching frequency and high
differential voltage between the input and the output. This
feature is extremely beneficial in automotive applications
SUPSW
Wide Input Voltage Range (3.5V to 36V)
provides power to the internal switch. When
Linear Regulator Output (BIAS)
SUP
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External Clock Input (FSYNC)
provides power to the device and
Detailed Description
Internal Block Diagram
Minimum On-Time
36V, 2.2MHz Step-Down Converter
Soft-Start
for more
with Low Operating Current
where the board space is limited and the converter needs
to maintain a well-regulated output voltage using an input
voltage that varies from 9V to 18V. Additionally, the device
incorporates an innovative design for fast-loop response
that further ensures good output-voltage regulation during
transients.
An enable-control input (EN) activates the device from its
low-power shutdown mode. EN is compatible with inputs
from automotive battery level down to 3.3V. The high-
voltage compatibility allows EN to be connected to SUP,
KEY/KL30, or the INH pin of a CAN transceiver.
EN turns on the internal regulator. Once V
the internal lockout threshold, V
troller activates and the output voltage ramps up within
8.5ms.
A logic-low at EN shuts down the device. During shut-
down, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5FA (typ). Drive EN high to bring the
device out of shutdown.
The device includes overvoltage protection circuitry that
protects the device when there is an overvoltage condi-
tion at the output. If the output voltage increases by more
than 110% of its set voltage, the device stops switching.
The device resumes regulation once the overvoltage
condition is removed.
Current-mode buck converters include an integrator
architecture and a load-line architecture. The integra-
tor architecture has large loop gain but slow transient
response. The load-line architecture has fast transient
response but low loop gain. The device features an inte-
grator architecture with innovative designs to improve
transient response. Thus, the device delivers high output-
voltage accuracy, plus the output can recover quickly
from a transient overshoot, which could damage other
on-board components during load transients.
The overload protection circuitry is triggered when the
device is in current limit and V
threshold. Under these conditions the device turns the
high-side FET off for 16ms and re-enters soft-start. If the
overload condition is still present, the device repeats the
cycle.
Fast Load-Transient Response
Overvoltage Protection
Overload Protection
UVL
System Enable (EN)
MAX16907
OUT
= 3.1V (typ), the con-
is below the reset
BIAS
is above