PCA6416AHF,128 NXP Semiconductors, PCA6416AHF,128 Datasheet - Page 13

• Manufacturer Part Number: PCA6416AHF,128
• Description: Interface - I/O Expanders
• Manufacturer: NXP Semiconductors

Specifications of PCA6416AHF,128

• Rohs: yes
• Maximum Operating Frequency: 100 kHz
• Operating Supply Voltage: 1.65 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: HWQFN-24
• Operating Current: 200 mA
• Output Current: 10 mA
• Product Type: I/O Expanders
• Factory Pack Quantity: 6000

NXP Semiconductors
PCA6416A
Product data sheet
Fig 11. Read from device registers
SDA
(cont.)
S
START condition
S
(repeated)
START condition
0
0
8.2 Read commands
1
slave address
1
0
slave address
0
To read data from the PCA6416A, the bus master must first send the PCA6416A address
with the least significant bit set to a logic 0 (see
The command byte is sent after the address and determines which register is to be
accessed.
After a restart, the device address is sent again, but this time the least significant bit is set
to a logic 1. Data from the register defined by the command byte is sent by the PCA6416A
(see
ACK clock pulse. After the first byte is read, additional bytes may be read, but the data
now reflects the information in the other register in the pair. For example, if Input Port 1 is
read, the next byte read is Input Port 0.There is no limit on the number of data bytes
received in one read transmission, but on the final byte received the bus master must not
acknowledge the data.
After a subsequent restart, the command byte contains the value of the next register to be
read in the pair. For example, if Input Port 1 was read last before the restart, the register
that is read after the restart is the Input Port 0.
0
0
0
Figure 11
0
acknowledge
0 AD
from slave
0 AD
DR
acknowledge
R/W
DR
from slave
0
R/W
1
A
and
All information provided in this document is subject to legal disclaimers.
A
0
MSB
Figure
0
at this moment master-transmitter becomes master-receiver
and slave-receiver becomes slave-transmitter
Rev. 2 — 10 January 2013
upper byte of register
command byte
0
data from lower or
DATA (first byte)
Low-voltage translating 16-bit I
12). Data is clocked into the register on the rising edge of the
0
0 1/0
acknowledge
from slave
acknowledge
1/0 1/0
from master
LSB
A
A
(cont.)
Figure 6
MSB
lower byte of register
data from upper or
DATA (last byte)
for device address).
2
C-bus/SMBus I/O expander
no acknowledge
from master
PCA6416A
LSB
© NXP B.V. 2013. All rights reserved.
NA
002aaf558
P
STOP
condition
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