PCAL9555AHF,128 NXP Semiconductors, PCAL9555AHF,128 Datasheet - Page 22

• Manufacturer Part Number: PCAL9555AHF,128
• Description: Interface - I/O Expanders
• Manufacturer: NXP Semiconductors

Specifications of PCAL9555AHF,128

• Rohs: yes
• Maximum Operating Frequency: 100 kHz
• Operating Supply Voltage: 1.65 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: HWQFN-24
• Operating Current: 160 mA
• Output Current: 25 mA
• Power Dissipation: 200 mW
• Product Type: I/O Expanders

NXP Semiconductors
PCAL9555A
Product data sheet
8.3 Power-on reset requirements
Reducing the current drive capability may be desirable to reduce system noise. When the
output switches (transitions from H/L), there is a peak current that is a function of the
output drive selection. This peak current runs through V
and will create noise (some radiated, but more critically Simultaneous Switching Noise
(SSN)). In other words, switching many outputs at the same time will create ground and
supply noise. The output drive strength control through the Current Control registers
allows the user to mitigate SSN issues without the need of additional external
components.
In the event of a glitch or data corruption, PCAL9555A can be reset to its default
conditions by using the power-on reset feature. Power-on reset requires that the device
go through a power cycle to be completely reset. This reset also happens when the device
is powered on for the first time in an application.
The two types of power-on reset are shown in
Table 28
types of power-on reset.
Fig 17. V
Fig 18. V
V
DD
ramp-up
V
(dV/dt)
DD
specifies the performance of the power-on reset feature for PCAL9555A for both
DD
DD
r
is lowered below 0.2 V or to 0 V and then ramped up to V
is lowered below the POR threshold, then ramped back up to V
V
I
All information provided in this document is subject to legal disclaimers.
drops below POR levels
Low-voltage 16-bit GPIO with Agile I/O, interrupt and weak pull-up
Rev. 1 — 3 October 2012
ramp-down
(dV/dt)
ramp-down
f
(dV/dt)
to V
f
when V
time to re-ramp
POR(min)
below 0.2 V or to V
Figure 17
t
DD
d(rst)
when V
time to re-ramp
− 50 mV
drops
t
d(rst)
DD
DD
drops
and
and V
SS
Figure
ramp-up
(dV/dt)
PCAL9555A
re-ramp-up
SS
(dV/dt)
package inductance
18.
r
DD
r
© NXP B.V. 2012. All rights reserved.
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