73S8010C-IMR/F1 Maxim Integrated, 73S8010C-IMR/F1 Datasheet - Page 6

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73S8010C-IMR/F1

Manufacturer Part Number
73S8010C-IMR/F1
Description
I2C Interface IC
Manufacturer
Maxim Integrated
Datasheet

Specifications of 73S8010C-IMR/F1

Rohs
yes
1.4 Microcontroller Interface
6
Name
INT
PWRDN
SAD0
SAD1
SAD2
SCL
SDA
I/OUC
AUX1UC
AUX2UC
(SO)
PIN
23
19
20
26
27
28
8
1
2
3
(QFN)
PIN
22
29
30
31
18
19
26
27
28
5
Description
Interrupt output (negative assertion): Interrupt output signal to the
processor. A 20 kΩ pull up to V
Power Down control input: Active High. When Power Down (PD) mode is
activated, all internal analog functions are disabled to place the 73S8010C
in its lowest power consumption mode. Must be tied to ground when the
power down function is not used.
Serial device address bits: Digital inputs for address selection that allow
the connection of up to 8 devices in parallel. Address selections as follows:
I
I
System controller data I/O to/from the card. Includes internal pull-up
resistor to V
System controller auxiliary data I/O to/from the card. Includes internal pull-
up resistor to V
System controller auxiliary data I/O to/from the card. Includes internal pull-
up resistor to V
2
2
C clock signal input.
C bi-directional serial data signal.
The default address when left unconnected is 48h.
Pins SAD0 and SAD1 are internally pulled-down and SAD2 is
internally pulled-up.
DD.
SAD2
DD.
DD.
0
0
0
0
1
1
1
1
SAD1
0
0
1
1
0
0
1
1
DD
SAD0
is provided internally.
0
1
0
1
0
1
0
1
I
2
C Address (7 bits)
0x4A
0x4C
0x4E
0x40
0x42
0x44
0x46
0x48
Rev. 1.5

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