CAT25256ZD2I-GT2 ON Semiconductor, CAT25256ZD2I-GT2 Datasheet - Page 10

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CAT25256ZD2I-GT2

Manufacturer Part Number
CAT25256ZD2I-GT2
Description
EEPROM 256KB SPI SER CMOS EEPROM
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT25256ZD2I-GT2

Rohs
yes
Memory Size
256 Kbit
Organization
32 x 8
Data Retention
100 yr
Maximum Clock Frequency
1000 KHz
Maximum Operating Current
2 mA
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TDFN-8
Interface Type
SPI
Minimum Operating Temperature
- 40 C

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT25256ZD2I-GT2
Manufacturer:
ON/安森美
Quantity:
20 000
Write Status Register
instruction according to timing shown in Figure 7. Only bits
2, 3, 4, 6 and 7 can be written using the WRSR command.
SCK
SO
CS
The Status Register is written by sending a WRSR
SI
Dashed Line = mode (1, 1)
SCK
WP
WP
CS
Dashed Line = mode (1, 1)
0
0
0
1
HIGH IMPEDANCE
0
2
0
3
OPCODE
0
4
0
5
Figure 7. WRSR Timing
Figure 8. WP Timing
0
http://onsemi.com
6
1
7
10
t
WPS
MSB
7
8
Write Protection
Block Protect bits BP0 and BP1 against being inadvertently
altered. When WP is low and the WPEN bit is set to “1”,
write operations to the Status Register are inhibited. WP
going low while CS is still low will interrupt a write to the
status register. If the internal write cycle has already been
initiated, WP going low will have no effect on any write
operation to the Status Register. The WP pin function is
blocked when the WPEN bit is set to “0”. The WP input
timing is shown in Figure 8.
The Write Protect (WP) pin can be used to protect the
t
9
6
WPH
10
5
11
4
DATA IN
12
3
13
2
14
1
15
0

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