831721AGILF IDT, 831721AGILF Datasheet

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831721AGILF

Manufacturer Part Number
831721AGILF
Description
Clock Drivers & Distribution
Manufacturer
IDT
Datasheet

Specifications of 831721AGILF

Product Category
Clock Drivers & Distribution
Rohs
yes
Part # Aliases
ICS831721AGILF
Block Diagram
ICS831721AGI REVISION A AUGUST 19, 2011
General Description
The ICS831721I is a high-performance, differential HCSL clock/data
multiplexer and fanout buffer. The device is designed for the
multiplexing of high-frequency clock and data signals. The device has
two differential, selectable clock/data inputs. The selected input
signal is output at one differential HCSL output. Each input pair
accepts HCSL, LVDS, and LVPECL levels. The ICS831721I is
characterized to operate from a 3.3V power supply. Guaranteed
input, output-to-output and part-to-part skew characteristics make
the ICS831721I ideal for those clock and data distribution
applications demanding well-defined performance and repeatability.
The ICS831721I supports the clock multiplexing and distribution of
PCI Express Generation 1, 2 and 3 clock signals.
nCLK0
nCLK1
CLK0
CLK1
IREF
nOE
SEL
Pulldown
Pullup/down
Pulldown
Pullup/down
Pulldown
Pullup
Differential Clock/Data Multiplexer
0
1
Q
nQ
1
Features
2:1 differential clock/data multiplexer with fanout
Two selectable, differential inputs
Each differential input pair can accept the following levels: HCSL,
LVHSTL, LVDS and LVPECL
One differential HCSL output
Maximum input/output clock frequency: 700MHz (maximum)
Maximum input/output data rate: 1400Mb/s (NRZ)LVCMOS
interface levels for all control inputs
Input skew: 55ps (maximum)
Part-to-part skew: 400ps (maximum)
Full 3.3V supply voltage
Available in lead-free (RoHS 6) 16 TSSOP package
-40°C to 85°C ambient operating temperature
Pin Assignment
4.4mm x 5.0mm x 0.925mm package body
nCLK0
nCLK1
CLK0
CLK1
GND
16 Lead TSSOP
V
V
DD
nc
DD
ICS831721I
G Package
Top View
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
©2011 Integrated Device Technology, Inc.
IREF
V
nQ
Q
GND
SEL
V
DD
DD
ICS831721I
DATA SHEET

Related parts for 831721AGILF

831721AGILF Summary of contents

Page 1

Differential Clock/Data Multiplexer General Description The ICS831721I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing of high-frequency clock and data signals. The device has two differential, selectable clock/data inputs. The selected ...

Page 2

ICS831721I Data Sheet Table 1. Pin Descriptions Number Name 1 CLK0 Input 2 nCLK0 Input Power DD 4 CLK1 Input 5 nCLK1 Input 6, 10 GND Power 7 nc Unused 9 nOE Input 12, 13 ...

Page 3

ICS831721I Data Sheet Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those ...

Page 4

ICS831721I Data Sheet Table 5. PCI Express Jitter Specifications, V Parameter Symbol Phase Jitter t J Peak-to-Peak (PCIe Gen 1) NOTE Phase Jitter RMS; REFCLK_HF_RMS (PCIe Gen 2) NOTE 2, 4 Phase Jitter RMS; t REFCLK_LF_RMS (PCIe ...

Page 5

ICS831721I Data Sheet AC Electrical Characteristics Table 5. HCSL AC Characteristics, V Symbol Parameter f Output Frequency OUT Buffer Additive Phase Jitter, RMS; t jit refer to Additive Phase Jitter Plot t Propagation Delay, NOTE 1 PD tsk(i) Input Skew; ...

Page 6

ICS831721I Data Sheet Additive Phase Jitter The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase ...

Page 7

ICS831721I Data Sheet Parameter Measurement Information 3.3V±0. 49.9 HCSL 33 IREF GND 49.9 475 0V 3.3V HCSL Output Load AC Test Circuit V DD nCLK[0:1] V Cross Points PP CLK[0:1] GND Differential Input Level nCLK[0:1] CLK[0:1] nQ ...

Page 8

ICS831721I Data Sheet Parameter Measurement Information, continued V MAX nQ V CROSS_MAX V CROSS_MIN Q V MIN Single-ended Measurement Points for Absolute Cross Point/Swing Rise Edge Rate +150mV 0.0V -150mV Differential Measurement Points for Rise/Fall Edge Rate ...

Page 9

ICS831721I Data Sheet Applications Information Recommendations for Unused Input Pins Inputs: LVCMOS Control Pins All control pins have internal pullups and pulldowns; additional resistance is not required but can be added for additional protection resistor can be used. ...

Page 10

... Gen 1 and the jitter result is reported in RMS. PCIe Gen 3 Magnitude of Transfer Function For a more thorough overview of PCI Express jitter analysis methodology, please refer to IDT Application Note PCI Express Reference Clock Requirements. 10 ©2011 Integrated Device Technology, Inc. ...

Page 11

ICS831721I Data Sheet Recommended Termination Figure 3A is the recommended source termination for applications where the driver and receiver will separate PCBs. This termination is the standard for PCI Express™ and HCSL output 0.5" Max 22 to ...

Page 12

... ICS831721AGI REVISION A AUGUST 19, 2011 vendor of the driver component to confirm the driver termination and V input requirements. For example, in Figure 2A, the input termination PP CMR applies for IDT open emitter LVHSTL drivers. If you are using an LVHSTL driver from another vendor, use their termination recommendation. 3.3V CLK nCLK Differential ...

Page 13

ICS831721I Data Sheet Power Considerations This section provides information on power dissipation and junction temperature for the ICS831752I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS831752I is the sum of the ...

Page 14

ICS831721I Data Sheet The purpose of this section is to calculate power dissipation on the IC per HCSL output pair. HCSL output driver circuit and termination are shown in Figure OUT = 17mA R REF = ...

Page 15

ICS831721I Data Sheet Package Outline and Package Dimensions Table 7. vs. Air Flow Table for a 16 Lead TSSOP JA Meters per Second Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS831721I is: 632 Package Outline ...

Page 16

... Marking 831721AGILF 31721AIL 831721AGILFT 31721AIL NOTE: Parts that are ordered with an “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...

Page 17

... IDT or any third parties. IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT ...

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