AM53CF94JCW AMD [Advanced Micro Devices], AM53CF94JCW Datasheet - Page 25

no-image

AM53CF94JCW

Manufacturer Part Number
AM53CF94JCW
Description
Enhanced SCSI-2 Controller (ESC)
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
Target Select without ATN Steps
Target Select with ATN Steps, SCSI-2 Bit NOT SET
Target Select with ATN Steps, SCSI-2 Bit SET
Register (06H)
Register (06H)
Register (06H)
Internal State
Internal State
Internal State
Bits 2:0 (Hex)
Bits 2:0 (Hex)
Bits 2:0 (Hex)
2
1
2
1
0
2
1
0
2
1
0
6
5
4
2
1
0
6
5
4
2
1
0
Interrupt Status
Interrupt Status
Interrupt Status
Register (05H)
Register (05H)
Register (05H)
Bits 7:0 (Hex)
Bits 7:0 (Hex)
Bits 7:0 (Hex)
11
11
01
01
01
12
12
12
02
02
02
12
12
12
12
12
12
02
02
02
02
02
02
Explanation
Selected; received entire CDB; check group code valid bit
Sequence halted in command phase due to parity error; some CDB bytes may
not have been received; check FIFO flags; Initiator asserted ATN in command
phase
Selected; received entire CDB; check group code valid bit
Sequence halted in command phase because of parity error; some CDB bytes
may not have been received; check FIFO flags
Selected; loaded bus ID into FIFO; null-byte message loaded into FIFO
Explanation
Selection complete; received one message byte and entire CDB; Initiator as-
serted ATN during command phase
Halted in command phase; parity error and ATN true
Selected with ATN; stored bus ID and one message byte; sequence halted be-
cause ATN remained true after first message byte
Selection completed; received one message byte and the entire CDB
Sequence halted in command phase because of parity error; some CDB bytes
not received; check group code valid bit and FIFO flags
Selected with ATN; stored bus ID and one message byte; sequence halted be-
cause of parity error or invalid ID message
Explanation
Selection completed; received three message bytes and entire CDB. ATN is true
Halted in command phase; parity error and ATN true
ATN remained true after third message byte
Selection completed; Initiator deasserts ATN after receipt of one message byte;
entire CDB received. ATN asserted during command phase
Sequence halted during command phase because of parity error; one message
byte received; some bytes of CDB not received; parity error and ATN true
Selected with ATN; stored bus ID and one message byte; sequence halted be-
cause of parity error or invalid ID message; ATN is true
Selection completed; received three message bytes and the entire CDB
Received three message bytes then halted in command phase because of parity
error; some CDB bytes not received; check group code valid bit and FIFO flags
Parity error during second or third message byte
Selection completed; Initiator deasserts ATN after receipt of one message byte;
entire CDB received
Sequence halted during command phase because of parity error; one message
byte received; some bytes of CDB not received; check FIFO flags and group
code valid bit
Selected with ATN; stored bus ID and one message byte; sequence halted be-
cause of parity error or invalid ID message
Am53CF94/Am53CF96
P R E L I M I N A R Y
AMD
25

Related parts for AM53CF94JCW