ZL30409/DDA ZARLINK [Zarlink Semiconductor Inc], ZL30409/DDA Datasheet - Page 9

• Manufacturer Part Number: ZL30409/DDA
• Description: T1/E1 System Synchronizer with Stratum 3 Holdover
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

All state machine changes occur synchronously on the rising edge of F8o. See the Control and Mode of Operation
section for full details.
Master Clock
The ZL30409 can use either a clock or crystal as the master timing source. For recommended master timing
circuits, see the Applications - Master Clock section.
Control and Mode of Operation
The active reference input (PRI or SEC) is selected by the RSEL pin as shown in Table 2.
The ZL30409 has three possible modes of operation, Normal, Holdover and Freerun.
As shown in Table 3, Mode/Control Select pins MS2 and MS1 select the mode and method of control. Refer to
Table 4 and Figure 7 for details of the state change sequences.
Normal Mode
Normal Mode is typically used when a slave clock source, synchronized to the network is required.
In Normal Mode, the ZL30409 provides timing (C1.5o, C2o, C4o, C8o, C16o and C19o) and frame synchronization
(F0o, F8o, F16o, TSP and RSP) signals, which are synchronized to one of two reference inputs (PRI or SEC). The
input reference signal may have a nominal frequency of 8kHz, 1.544MHz, 2.048MHz or 19.44MHz.
Figure 6 - Control State Machine Block Diagram
MS2
RSEL
RSEL
0
0
1
1
0
1
Table 3 - Operating Modes and States
Table 2 - Input Reference Selection
Select MUX
Reference
To
MS1
0
1
0
1
Zarlink Semiconductor Inc.
MS1
State Machine
ZL30409
Corrector
To TIE
Enable
Control
Input Reference
9
MS2
HOLDOVER
FREERUN
SEC
PRI
NORMAL
Reserved
To DPLL
Select
State
Mode
PCCi
Data Sheet