AK4122A AKM [Asahi Kasei Microsystems], AK4122A Datasheet - Page 17

• Manufacturer Part Number: AK4122A
• Description: 24-Bit 96kHz SRC with DIR
• Manufacturer: AKM [Asahi Kasei Microsystems]

Note 14. In this case, PORT2 is input port. If PORT2 is unused, the digital I/O pins should be processed appropriately
Note 15. In this case, PORT3 is output port. If PORT3 is unused, the digital I/O pins should be processed appropriately
■
MS1076-E-01
PORT1 can be operated in slave mode only. PORT2 and PORT3 work in master mode and slave mode. Internal system
clock is created by internal PLL using LRCK1, LRCK2 or LRCK of DIR. The MCLK is not needed when PORT2 and
PORT3 are in slave mode. Set the MCLK2 pin and OMCLK pin to DVSS. When PORT2 and PORT3 are used in master
mode, the MCLK2 pin and OMCLK pin should be supplied MCLK. The M/S2 pin and M/S3 pin control master and slave
mode switching.
case of detecting the sampling frequency by MCLK when DIR is used, MCLK (MCLK2 or OMCLK) of selected output
port (PORT2 or PORT3) should be input.
System Clock
as shown in
as shown in
M/S2 pin
M/S3 pin
H
H
L
L
Table 4
Table
Table
OCKS1
ICKS1
0
0
1
1
0
0
1
1
and
2.
3.
Master
Master
Mode
Mode
Slave
Slave
Table 5
OCKS0
ICKS0
Table 5. OMCLK frequency select for Master mode
Table 4. MCLK2 frequency select for Master mode
0
1
0
1
0
1
0
1
show setting of MCLK frequency when PORT2 and PORT3 are master mode. In
Unused pin
Unused pin
OMCLK
OMCLK
MCLK2
MCLK2
LRCK2
LRCK2
SDTIO
SDTIO
BICK2
BICK2
LRCK
SDTO
LRCK
SDTO
BICK
BICK
32kHz ≤ fs ≤ 48kHz
32kHz ≤ fs ≤ 48kHz
Table 2. Pin Setting for PORT2
Table 3. Pin Setting for PORT3
256fs
384fs
512fs
768fs
256fs
384fs
512fs
768fs
Pin I/O
Pin I/O
- 17 -
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
OMCLK
MCLK2
This pin should be connected to DVSS.
This pin should be connected to DVSS.
This pin should be connected to DVSS.
This pin should be connected to DVSS.
This pin should be connected to DVSS.
This pin should be open.
This pin should be open.
This pin should be connected to DVSS.
This pin should be connected to DVSS.
This pin should be connected to DVSS.
This pin should be connected to DVSS.
This pin should be open.
This pin should be connected to DVSS.
This pin should be open.
This pin should be open.
This pin should be open.
48kHz < fs ≤ 96kHz
48kHz < fs ≤ 96kHz
256fs
384fs
256fs
384fs
N/A
N/A
N/A
N/A
Setting
Setting
(default)
(default)
[AK4122A]
2010/05