74LCX162373MTDX Fairchild Semiconductor, 74LCX162373MTDX Datasheet - Page 5

IC LATCH TRANSP 16BIT LV 48TSSOP

74LCX162373MTDX

Manufacturer Part Number
74LCX162373MTDX
Description
IC LATCH TRANSP 16BIT LV 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Type
D-Typer
Datasheet

Specifications of 74LCX162373MTDX

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2 V ~ 3.6 V
Independent Circuits
2
Delay Time - Propagation
1.5ns
Current - Output High, Low
12mA, 12mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
LCX
Number Of Bits
16
Number Of Elements
2
Latch Mode
Transparent
Polarity
Non-Inverting
Technology
CMOS
Package Type
TSSOP W
Propagation Delay Time
9ns
Operating Supply Voltage (typ)
2.5/3.3V
High Level Output Current
-12mA
Low Level Output Current
12mA
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74LCX162373MTDX
Quantity:
15 000
t
t
t
t
t
t
t
t
t
t
t
t
t
I
I
'
C
C
C
PHL
PLH
PHL
PLH
PZL
PZH
PLZ
PHZ
S
H
W
OSHL
OSLH
V
V
OFF
CC
DC Electrical Characteristics
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
Dynamic Switching Characteristics
Capacitance
I
Symbol
IN
OUT
PD
Symbol
OLP
OLV
Symbol
CC
Symbol
Propagation Delay
I
Propagation Delay
LE to O
Output Enable Time
Output Disable Time
Setup Time, I
Hold Time, I
LE Pulse Width
Output to Output Skew (Note 8)
Power-Off Leakage Current
Quiescent Supply Current
Increase in I
n
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Quiet Output Dynamic Peak V
Quiet Output Dynamic Valley V
to O
n
n
n
CC
n
to LE
Parameter
to LE
per Input
Parameter
Parameter
Parameter
OL
OL
V
V
3.6V
V
I
I
IH
or V
V
(Continued)
d
V
CC
C
C
C
C
O
V
V
CC
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.0
L
L
L
L
CC
I
or GND
, V
C

5.5V
50 pF, V
30 pF, V
50 pF, V
30 pF, V
0.6V
O
L
V
V
V
3.3V
Conditions
d
CC
CC
CC
50 pF
5.5V (Note 7)
5
r
IH
IH
IH
IH
Open, V
3.3V, V
3.3V, V
Max
0.3V
6.2
6.2
6.3
6.3
6.9
6.9
6.0
6.0
1.0
1.0
Conditions
3.3V, V
2.5V, V
3.3V, V
2.5V, V
T
I
I
A
I
OSHL
0V or V
0V or V

0V or V
IL
IL
IL
IL
40
) or LOW-to-HIGH (t
Conditions
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2.5
1.5
3.0
q
0V
0V
0V
0V
C to
V
C
CC
CC
CC
L
CC
, f

85
50 pF
2.3
2.3
2.3
2.7V
q
10 MHz
V
C, R
(V)
0



CC
Max
6.7
6.7
7.2
7.2
7.3
7.3
6.3
6.3
3.6
3.6
3.6
L
OSLH
500
T
). Parameter guaranteed by design.
:
A
V
Min
3.3
2.5
3.3
2.5
(V)
CC
V
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
3.0
2.0
3.5
CC

40
C
L
q
C to
2.5V
www.fairchildsemi.com
T
30 pF
Typical
A
Typical



Max
r
500
0.35
0.25
0.35
0.25
r
85
10
20
20
20
7
8
25
Max
0.2V
7.4
7.4
7.6
7.6
9.0
9.0
7.2
7.2
q
q
C
C
Units
Units
Units
Units
P
P
P
pF
pF
pF
V
V
A
A
A
ns
ns
ns
ns
ns
ns
ns
ns

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