NC7SV57L6X_F113 Fairchild Semiconductor, NC7SV57L6X_F113 Datasheet - Page 13

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NC7SV57L6X_F113

Manufacturer Part Number
NC7SV57L6X_F113
Description
IC GATE 2INPUT ULP-A 6-MICROPAK
Manufacturer
Fairchild Semiconductor
Series
7SVr
Datasheet

Specifications of NC7SV57L6X_F113

Logic Type
Configurable Multiple Function
Number Of Circuits
1
Number Of Inputs
2
Schmitt Trigger Input
No
Output Type
Single-Ended
Current - Output High, Low
24mA, 24mA
Voltage - Supply
0.9 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
6-MicroPak™
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2002 Fairchild Semiconductor Corporation
NC7SV57 • NC7SV58 • Rev. 1.0.4
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Tape and Reel Specifications
Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:
http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf
.
Package Designator
FHX
5X
DETAIL A
PIN 1
MIN 250uM
(0.08) 4X
2X
A. COMPLIES TO JEDEC MO-252 STANDARD
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994
D. LANDPATTERN RECOMMENDATION IS BASED ON FSC
E. DRAWING FILENAME AND REVISION: MGF06AREV3
NOTES:
B. DIMENSIONS ARE IN MILLIMETERS.
0.35
0.25
DESIGN.
0.05 C
C
0.35
1
6
Figure 19.
BOTTOM VIEW
SIDE VIEW
TOP VIEW
Leader (Start End)
Trailer (Hub End)
1.00
Tape Section
2
5
Carrier
3
4
6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch
0.60
0.55MAX
B
(0.08)
4X
0.09
0.19
1.00
A
0.05 C
6X
2X
Cavity Number
.05 C
0.10
125 (Typical)
13
75 (Typical)
0.05 C
5000
C B A
5X
1X
5X 0.40
CHAMFER
1X 0.45
0.075X45°
0.52
0.57
RECOMMENDED LAND PATTERN
FOR SPACE CONSTRAINED PCB
ALTERNATIVE LAND PATTERN
FOR UNIVERSAL APPLICATION
Cavity Status Cover Type Status
(0.05) 6X
DETAIL A
PIN 1 LEAD SCALE: 2X
Empty
Empty
Filled
0.90
0.20 6X
0.89
6X 0.19
0.35
0.35
0.73
0.66
0.40
0.30
Sealed
Sealed
Sealed
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