NC7SV57L6X_F113 Fairchild Semiconductor, NC7SV57L6X_F113 Datasheet

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NC7SV57L6X_F113

Manufacturer Part Number
NC7SV57L6X_F113
Description
IC GATE 2INPUT ULP-A 6-MICROPAK
Manufacturer
Fairchild Semiconductor
Series
7SVr
Datasheet

Specifications of NC7SV57L6X_F113

Logic Type
Configurable Multiple Function
Number Of Circuits
1
Number Of Inputs
2
Schmitt Trigger Input
No
Output Type
Single-Ended
Current - Output High, Low
24mA, 24mA
Voltage - Supply
0.9 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
6-MicroPak™
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2002 Fairchild Semiconductor Corporation
NC7SV57 • NC7SV58 • Rev. 1.0.4
NC7SV57 / NC7SV58
TinyLogic
Logic Gates
Features
Ordering Information
NC7SV57P6X
NC7SV57L6X
NC7SV57FHX
NC7SV58P6X
NC7SV58L6X
NC7SV58FHX
Part Number
0.9V to 3.6V V
3.6V Over-Voltage Tolerant I/Os at V
from 0.9V to 3.6V
Extremely High Speed t
Power-Off High-Impedance Inputs and Outputs
High Static Drive (I
Proprietary Quiet Series™ Noise/EMI Reduction
Ultra-Small MicroPak™ Package
Ultra-Low Dynamic Power
- 2.5ns: Typical for 2.7V to 3.6V V
- 3.1ns: Typical for 2.3V to 2.7V V
- 4.0ns: Typical for 1.65V to 1.95V V
- 6.0ns: Typical for 1.4V to 1.6V V
- 8.0ns: Typical for 1.1V to 1.3V V
- 23.0ns: Typical for 0.9V V
- ±24mA at 3.00V V
- ±18mA at 2.30V V
- ±6mA at 1.65V V
- ±4mA at 1.4V V
- ±2mA at 1.1V V
- ±0.1mA at 0.9V V
CC
®
Supply Operation
CC
CC
OH
Top Mark
CC
ULP-A Universal Configurable Two-Input
CC
/I
CC
CC
OL
V57
V58
H3
H3
H4
H4
PD
)
CC
6-Lead SC70, EIAJ SC-88a, 1.25mm Wide
6-Lead Micropak™, 1.0mm Wide
6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch
6-Lead SC70, EIAJ SC-88a, 1.25mm Wide
6-Lead Micropak™, 1.0mm Wide
6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch
CC
CC
CC
CC
CC
CC
Description
The NC7SV57 and NC7SV58 are universal configurable
two-input logic gates from Fairchild’s Ultra-Low Power
(ULP-A) series of TinyLogic
applications that require extreme high-speed, high
drive, and low power. This product is designed for a
wide low-voltage operating range (0.9V to 3.6V V
and applications that require more drive and speed than
the TinyLogic
low-power operation.
Each device is capable of being configured for 1 of 5
unique two-input logic functions. Any possible two-input
combinatorial logic function can be implemented, as
shown in the Function Selection Table. Device
functionality is selected by how the device is wired at
the board level. Figures 1 through 10 illustrate how to
connect the NC7SV57 and NC7SV58, respectively, for
the desired logic function. All inputs have been
implemented with hysteresis.
The NC7SV57 and NC7SV58 are uniquely designed for
optimized power and speed and are fabricated with an
advanced CMOS technology to achieve high-speed
operation
dissipation.
Package
while
®
ULP series, but still offer best-in-class,
maintaining
®
. ULP-A is ideal for
low
Packing Method
3000 Units on
5000 Units on
3000 Units on
5000 Units on
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
December 2010
CMOS
www.fairchildsemi.com
power
CC
)

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NC7SV57L6X_F113 Summary of contents

Page 1

... NC7SV57FHX H3 NC7SV58P6X V58 NC7SV58L6X H4 NC7SV58FHX H4 © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 Description The NC7SV57 and NC7SV58 are universal configurable two-input logic gates from Fairchild’s Ultra-Low Power CC (ULP-A) series of TinyLogic applications that require extreme high-speed, high drive, and low power ...

Page 2

... Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and derated 90% and device frequency at 10MHz, with C = 15pF load. L © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 Figure 1. Battery Life vs. V Supply Voltage CC •.9)/(P )/24hrs/day device ...

Page 3

... Orientation of top mark determines pin one location. 5. Reading the top mark left to right, pin one is the lower left pin. Pin Definitions Pin # SC70 © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 Figure 3. MicroPak™ (Top Through View) Figure 4. Pin 1 Orientation Pin # MicroPak™ ...

Page 4

... OR 2-Input OR with Inverted Input 2-Input OR with Both Inputs Inverted 2-Input NOR 2-Input NOR with Inverted Input 2-Input NOR with Both Inputs Inverted 2-Input XOR 2-Input XNOR © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 NC7SV57 • • ...

Page 5

... Figure 5. 2-Input AND Gate Figure 7. 2-Input NAND with Inverted B Input © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 implementation is next to the board-level physical implementation of how the pins of the function should be connected. function. The logical Figure 6. ...

Page 6

... Figure 10. 2-Input NAND Gate Figure 12. 2-Input AND with Inverted B Input © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 implementation is next to the board-level physical implementation of how the pins of the function should be connected. function. The logical Figure 11. 2-Input AND Gate with Inverted A Input Figure 14 ...

Page 7

... OL T Operating Temperature, Free Air A Δt/ΔV Minimum Input Edge Rate θ Thermal Resistance JA Note: 7. Unused inputs must be held HIGH or LOW. They may not float. © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 Parameter (6) HIGH or LOW State V = < < ...

Page 8

... V HIGH Level Output 1.40 ≤ Voltage 1.65 ≤ V 2.30 ≤ V 2.30 ≤ V 2.70 ≤ V 2.30 ≤ V 2.70 ≤ V 2.70 ≤ V © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 V Conditions CC Min. 0.90 0.30 1.10 0.40 1.40 0.50 1.65 ...

Page 9

... V 2.30 ≤ V 2.70 ≤ V Input C IN Capacitance Output C OUT Capacitance Power C Dissipation 0.90 to 3.60 PD Capacitance © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 (Continued) V Conditions CC 0.90 ≤ 1.30 CC ≤ 1. =100µA OL  ≤ 1.95 CC ≤ 2.70 CC  ...

Page 10

... AC Loadings and Waveforms Symbol 3.3V ± 0. 1.5V mo © 2002 Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 Figure 15. AC Test Circuit Figure 16. AC Waveforms V CC 2.5V ± 0.2V 1.8V ± 0.15V 1.5V ± 0.10V 1.2V ± 0.10V 0.9V ...

Page 11

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...

Page 12

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...

Page 13

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...

Page 14

... Fairchild Semiconductor Corporation NC7SV57 • NC7SV58 • Rev. 1.0.4 14 www.fairchildsemi.com ...

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