AM29LV160 AMD [Advanced Micro Devices], AM29LV160 Datasheet
AM29LV160
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AM29LV160 Summary of contents
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... Am29LV160B Data Sheet July 2003 The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig- inally developed the specification, these products will be offered to customers of both AMD and Fujitsu ...
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... Am29LV160B 16 Megabit ( 8-Bit 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors Manufactured on 0.32 µ ...
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... GENERAL DESCRIPTION The Am29LV160B Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes or 1,048,576 words. The device is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) data appears on DQ7–DQ0. This device is designed to be programmed in-system with the standard system 3 ...
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... A0–A19 =3.0–3.6 V 70R CC = 2.7–3 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29LV160B Am29LV160B 80 90 120 80 90 120 80 90 120 – DQ0 DQ15 (A-1) Input/Output Buffers Data STB Latch Y-Gating ...
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... DQ5 10 DQ12 11 DQ4 DQ11 14 DQ3 15 DQ10 16 DQ2 17 DQ9 18 DQ1 19 DQ8 20 DQ0 Standard TSOP Reverse TSOP Am29LV160B 48 A16 47 BYTE DQ15/A-1 44 DQ7 43 DQ14 42 DQ6 41 DQ13 40 DQ5 39 DQ12 38 DQ4 DQ11 35 DQ3 34 DQ10 33 DQ2 32 ...
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... A6 A5 DQ0 Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150 C for prolonged periods of time. Am29LV160B 44 WE# 43 A19 A10 39 A11 38 ...
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... Hardware reset pin RY/BY# = Ready/Busy output (N/A SO 044 3.0 volt-only single power supply CC (see Product Selector Guide for speed options and voltage supply tolerances Device ground Pin not connected internally 6 LOGIC SYMBOL 20 A0–A19 DQ0–DQ15 CE# OE# WE# RESET# BYTE# Am29LV160B (A-1) RY/BY# (N/A SO 044) 21358G-4 ...
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... Megabit (2M x 8-Bit/1M x 16-Bit) CMOS Flash Memory 3.0 Volt-only Read, Program, and Erase office to confirm availability of specific valid combinations and to check on newly released combinations. Valid Combinations for FBGA Packages Order Number AM29LV160BT70R, AM29LV160BB70R AM29LV160BT80, AM29LV160BB80 AM29LV160BT90, AM29LV160BB90 AM29LV160BT120, AM29LV160BB120 Am29LV160B Package Marking L160BT70R, WCC ...
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... The command register it- self does not occupy any addressable memory loca- tion. The register is composed of latches that store the commands, along with the address and data informa- tion needed to execute the command. The contents of Table 1. Am29LV160B Device Bus Operations Operation CE# OE# WE# RESET# Read ...
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... CE#, WE#, and OE# control signals. Standard address access timings provide new data when addresses are changed. While in sleep mode, output data is latched and always available to the system. I Characteristics table represents the automatic sleep mode current specification. Am29LV160B CC 0 but not within IH ) for read access when the ...
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... Refer to the AC Characteristics tables for RESET# pa RESET# is held rameters and to Figure 14 for the timing diagram. Output Disable Mode When the OE# input disabled. The output pins are placed in the high imped- ance state. Am29LV160B (during Embedded Algorithms). The (not during Embed- READY after RH . ...
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... Table 2. Sector Address Tables (Am29LV160BT) Sector A19 A18 A17 A16 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 ...
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... Table 3. Sector Address Tables (Am29LV160BB) Sector A19 A18 A17 A16 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 ...
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... When using programming equipment, the autoselect mode requires V (11 12 address pin ID A9. Address pins A6, A1, and A0 must be as shown in Table 4. Am29LV160B Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: ...
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... RESET Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 1. Temporary Sector Unprotect Operation Am29LV160B START ID (Note 1) IH (Note 2) 21358G-5 ...
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... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Unprotect Algorithm Am29LV160B START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes No All sectors protected? Yes ...
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... Query Unique ASCII string “QRY” 0059h 0002h Primary OEM Command Set 0000h 0040h Address for Primary Extended Table 0000h 0000h Alternate OEM Command Set (00h = none exists) 0000h 0000h Address for Alternate OEM Extended Table (00h = none exists) 0000h Am29LV160B Description ...
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... Erase Block Region 2 Information 0020h 0000h 0000h 0000h Erase Block Region 3 Information 0080h 0000h 001Eh 0000h Erase Block Region 4 Information 0000h 0001h Am29LV160B Description pin present) PP pin present µs N µs (00h = not supported (00h = not supported) N ...
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... CE# and WE# must be a logical zero while OE logical one. CC Power-Up Write Inhibit If WE device does not accept commands on the rising edge of WE#. The internal state machine is automatically reset to reading array data on power-up. Am29LV160B Description is greater than LKO or WE initiate a write cycle, IH ...
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... When the Embedded Program algorithm is complete, the device then returns to reading array data and ad- dresses are no longer latched. The system can deter- mine the status of the program operation by using DQ7, DQ6, or RY/BY#. See “Write Operation Status” for in- formation on these status bits. Am29LV160B ID 19 ...
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... Erase algorithm are ignored. Note that a hardware reset during the chip erase operation immediately ter- minates the operation. The Chip Erase command se- quence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Am29LV160B START Write Program Command Sequence Data Poll ...
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... The system may also write the autoselect command sequence when the device is in the Erase Suspend mode. The device allows reading autoselect codes even at addresses within erasing sectors, since the codes are not stored in the memory array. When the Am29LV160B 21 ...
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... START Write Erase Command Sequence Data Poll from System No Data = FFh? Yes Erasure Completed Notes: 1. See Table 9 for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 4. Erase Operation Am29LV160B Embedded Erase algorithm in progress 21358G-8 ...
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... Table 9. Am29LV160B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector Protect Verify 4 (Note 9) Byte Word CFI Query (Note 10) ...
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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously with DQ5. Figure 5. Data# Polling Algorithm Am29LV160B Yes Yes PASS 21358G-9 ...
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... DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase operation still toggling, the device did not complete the operation successfully, and Am29LV160B 25 ...
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... Complete, Write Reset Command Notes: 1. Read toggle bit twice to determine whether or not it is toggling. See text. 2. Recheck toggle bit because it may stop toggling as DQ5 changes to “1”. See text. Figure 6. Toggle Bit Algorithm Am29LV160B (Note 1) No (Notes Program/Erase Operation Complete ...
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... Table 10 shows the outputs for DQ3. Table 10. Write Operation Status DQ7 DQ5 (Note 2) DQ6 (Note 1) DQ7# Toggle 0 0 Toggle toggle 0 Data Data Data DQ7# Toggle 0 Am29LV160B DQ2 DQ3 (Note 2) RY/BY# N/A No toggle 0 1 Toggle 0 N/A Toggle 1 Data Data 1 N/A N ...
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... Operating ranges define those limits between which the func- tionality of the device is guaranteed +0.5 V. During +2 +0.5 V 2.0 V 21358G-11 Figure 8. Maximum Positive Overshoot Am29LV160B ) . . . . . . . . . . .0°C to +70° .–40°C to +85° .–55°C to +125° 21358G-12 Waveform ...
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... 4.0 mA min I = -2 min I = -100 µ min . Typical max Am29LV160B Min Typ Max Unit 1.0 µA 35 µA 1.0 µ 0.2 5 µA 0.2 5 µA 0.2 5 µA –0.5 ...
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... Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note 1000 1500 2000 Time Frequency in MHz Figure 10. Typical I vs. Frequency CC1 Am29LV160B 2500 3000 3500 3 4000 21358G-13 5 21358G-14 ...
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... Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels 21358G-15 INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Am29LV160B 70R, 90, 80 120 Unit 1 TTL gate L 30 100 0.0– ...
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... Test Setup Read Toggle and Data# Polling t RC Addresses Stable t ACC OEH t CE HIGH Z Output Valid Figure 13. Read Operations Timings Am29LV160B Speed Options 70R 80 90 120 Min 120 Max 120 Max 120 Max 30 30 ...
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... CE#, OE# RESET# RY/BY# CE#, OE# RESET# Test Setup Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 14. RESET# Timings Am29LV160B All Speed Options Unit Max 20 µs Max 500 ns Min 500 ns Min 50 ns Min 20 µs Min ...
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... Address DQ15 Input Output t FHQV The falling edge of the last WE# signal t SET ( HOLD AH and t specifications Am29LV160B Speed Options 80 90 120 Unit 120 ns Data Output (DQ0–DQ7) Address Input 21358G-19 21358G-20 ...
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... Speed Options 70R 80 Min 70 80 Min Min 45 45 Min 35 35 Min Min Min Min Min Min 35 35 Min Byte Typ Word Typ Typ Min Min Min Am29LV160B 90 120 Unit 90 120 µ ...
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... PA = program address program data Illustration shows device in word mode WPH A0h t BUSY is the true data at the program address. OUT Figure 17. Program Operation Timings Am29LV160B Read Status Data (last two cycles WHWH1 D Status OUT t RB 21358G-21 ...
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... SA = sector address (for Sector Erase Valid Address for reading status data (see “Write Operation Status”). 2. Illustration shows device in word mode. Figure 18. Chip/Sector Erase Operation Timings 555h for chip erase WPH 55h 30h 10 for Chip Erase t BUSY Am29LV160B Read Status Data WHWH2 In Complete Progress t RB 21358G-22 37 ...
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... Figure 20. Toggle Bit Timings (During Embedded Algorithms Complement Complement Status Data Status Data Valid Status Valid Status (first read) (second read) Am29LV160B VA High Z True Valid Data High Z True Valid Data 21358G- Valid Status Valid Data (stops toggling) 21358G-24 ...
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... CE# WE# RY/BY# Figure 22. Temporary Sector Unprotect Timing Diagram Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Min Min Program or Erase Command Sequence t RSP Am29LV160B Erase Resume Erase Erase Complete Read 21358G-25 All Speed Options Unit 500 4 t VIDR 21358G-26 ns µs ...
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... A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect Figure 23. Sector Protect/Unprotect Timing Diagram 40 Valid* Valid* 60h Sector Protect: 150 µs Sector Unprotect Am29LV160B Valid* Verify 40h Status 21358G-27 ...
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... See the “Erase and Programming Performance” section for more information. Speed Options 70R 80 Min 70 80 Min Min 45 45 Min 35 35 Min Min Min Min Min Min 35 35 Min Byte Typ Word Typ Typ Am29LV160B 90 120 Unit 90 120 ...
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... PA for program SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase Am29LV160B PA DQ7# D OUT = data written to the OUT 21358G-28 ...
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... V (3.0 V for 70R), 1,000,000 cycles. CC –100 mA = 3.0 V, one pin at a time. CC Test Setup OUT V IN Test Conditions 150 C 125 C Am29LV160B Unit Comments s Excludes 00h programming prior to erasure (Note 4) s µs µs Excludes system level overhead (Note 1,000,000 cycles. Additionally, CC ...
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... TSR048—48-Pin Reverse TSOP (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") BSC * For reference only. BSC is an ANSI standard for Basic Space Centering 18.30 18.50 19.80 20.20 0˚ 5˚ 0.50 0. 18.30 18.50 19.80 20.20 0˚ 5˚ 0.50 0.70 Am29LV160B 0.95 1.05 11.90 12.10 0.50 BSC 0.05 0.15 16-038-TS48-2 0.08 TS 048 0.20 DT95 8-8-96 lv 0.10 0.21 0.95 1.05 11.90 12.10 0.50 BSC 0.05 0.15 SEATING PLANE 16-038-TS48 TSR048 0.08 DT95 0.20 8-8- ...
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... PHYSICAL DIMENSIONS FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA (measured in millimeters) 1.00 1.20 0.20 0.30 0.80 BSC 0.25 0. 9.00 BSC 0.84 0.94 5.60 BSC 0.40 BSC. Am29LV160B 0.20 (4X) A 8.00 BSC B 0. 0.40 BSC. 4.00 BSC PIN 1 ID 16-038-FBA-2_AA ET153 11.6. ...
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... PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters 1.27 NOM. TOP VIEW 28.00 28.40 2.17 2.45 0.35 0.50 SIDE VIEW 46 23 13.10 15.70 13.50 16.30 22 2.80 MAX. SEATING PLANE 0.10 0.35 Am29LV160B 0.10 0.21 0˚ 0.60 8˚ 1.00 END VIEW 16-038-SO44-2 SO 044 DF83 8-8-96 lv ...
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... Physical Dimensions Changed drawing to FBC048. Revision G+1 Connection Diagrams FBGA: Corrected to indicate that diagram shows the top view, balls facing down. Command Definitions Table Corrected the address in the sixth cycle of the chip erase sequence to AAAh. Am29LV160B . VCS . This parameter is not VIDR specifications CC 47 ...