QL4016 ETC, QL4016 Datasheet - Page 7

• Manufacturer Part Number: QL4016
• Description: 16/000 Usable PLD Gate QuickRAM ESP Combining Performance/ Density and Embedded RAM
• Manufacturer: ETC

© 2002 QuickLogic Corporation
a. Stated timing for worst case Propagation Delay over process variation at V
a. These loads are used for t
t
t
t
t
t
t
t
t
t
t
t
t
t
I/O
ISU
IH
IOCLK
IORST
IESU
IEH
OUTLH
OUTHL
PZH
PZL
PHZ
PLZ
TA = 25 C. Multiply by the appropriate Delay Factor, K, for speed grade, voltage and temperature
settings as specified in the Operating Range.
Symbol
Symbol
Output Delay Low to High
Output Delay High to Low
Output Delay Tri-state to High
Output Delay Tri-state to Low
Output Delay High to Tri-state
Output Delay High to Tri-state
Input Delay (bidirectional pad)
Input Register Set-Up Time
Input Register Hold Time
Input Register Clock to Q
Input Register Reset Delay
Input Register Clock Enable Set-Up Time
Input Register Clock Enable Hold Time
PXZ
Parameter
(see
Figure 5: Loads Used for t
Table 8: I/O Cell Output Delays
Parameter
Table 7: I/O Cell Input Delays
Figure 5
tPHZ
a
a
5 pF
)
2.1
2.2
1.2
1.6
2.0
1.2
3
Output Load Capacitance (pF)
PXZ
Propagation Delays (ns)
1.3
3.1
0.0
0.7
0.6
2.3
0.0
1
2.5
2.6
1.7
2.0
50
-
-
Propagation Delays (ns)
QL4016 QuickRAM Data Sheet Rev I
tPLZ
5 pF
1.6
3.1
0.0
1.0
0.9
2.3
0.0
2
3.1
3.2
2.2
2.6
75
-
-
CC
1.8
3.1
0.0
1.2
1.1
2.3
0.0
Fanout
3
= 3.3 V and
2.1
3.1
0.0
1.5
1.4
2.3
0.0
4
100
3.6
3.7
2.8
3.1
a
-
-
3.1
3.1
0.0
2.5
2.4
2.3
0.0
8
150
4.7
4.8
3.9
4.2
-
-
3.6
3.1
0.0
3.0
2.9
2.3
0.0
10
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