AM53CF94 Advanced Micro Devices, AM53CF94 Datasheet - Page 40

• Manufacturer Part Number: AM53CF94
• Description: Enhanced SCSI-2 Controller (ESC)
• Manufacturer: Advanced Micro Devices

Send Data Command (Command Code 22H/A2H)
The Send Data Command is used by the Target to
inform the Initiator to receive data bytes. The SCSI bus
phase lines are set to the Data-In Phase and data bytes
are transferred from the Target device to the Initiator
device.
Disconnect Steps Command
(Command Code 23H/A3H)
The Disconnect Steps Command is used by the Target
to disconnect from the SCSI bus. This command is exe-
cuted in two steps. In the Message In phase, the Target
sends two bytes of the Save Data Pointers commands.
Following transmission, the Target disconnects from the
SCSI bus. Successful Operation and Disconnected bits
are set in the Interrupt Status Register (INSTREG) upon
command completion. If ATN signal is asserted by the
Initiator then Successful Operation and Service Re-
quest bits are set in the INSTREG, the Command Regis-
ter (CMDREG) is cleared and Disconnect Steps Com-
mand terminates without disconnecting.
Terminate Steps Command
(Command Code 24H/A4H)
The Terminate Steps Command is used by the Target to
disconnect from the SCSI bus. This command is exe-
cuted in three steps. While in Status phase, the Target
first sends a 1 byte status message. Following the
Status phase the Target moves to the Message In
phase and sends another 1 byte message. Lastly, the
Target disconnects from the SCSI bus. The Discon-
nected bit is set in the Interrupt Status Register
(INSTREG) upon command completion. If ATN signal is
asserted by the Initiator, then Successful Operation and
Service Request bits are set in the INSTREG, an inter-
rupt is generated and the Command Register
(CMDREG) is cleared and Terminate Steps Command
terminates without disconnecting.
Target Command Complete Steps Command
(Command Code 25H/A5H)
The Target Command Complete Steps Command is
used by the Target to inform the Initiator of a linked com-
mand completion. This command consists of two steps.
In the first step, the Target sends one status byte to the
Initiator in the Status Phase. The Target then sends one
message byte to the Initiator in the Message In Phase.
The Successful Operation bit is set in the Interrupt
Status Register (INSTREG) upon command comple-
tion. If ATN signal is asserted by the Initiator then
Successful Operation and Service Request bits are set
in the INSTREG, the Command Register (CMDREG) is
cleared and Target Command Complete Steps Com-
mand terminates prematurely.
Disconnect Command
(Command Code 27H/A7H)
The Disconnect Command is used by the Target to dis-
connect from the SCSI bus. All SCSI bus signals except
RSTC are released and the device returns to the Dis-
connected state. The RSTC signal is driven active for
about 25 micro seconds (depending on clock frequency
40
AMD
Am53CF94/Am53CF96
P R E L I M I N A R Y
and clock factor). Interrupt is not generated to the micro-
processor.
Receive Message Steps Command
(Command Code 28H/A8H)
The Receive Message Steps Command is used by the
Target to request message bytes from the Initiator. The
Target receives the message bytes from the Initiator
while the SCSI bus is in the Message Out Phase. The
Successful Operation bit is set in the Interrupt Status
Register (INSTREG) upon command completion. If
ATN signal is asserted by the Initiator then Successful
Operation and Service Request bits are set in the IN-
STREG, the Command Register (CMDREG) is cleared,
but if a parity error is detected, the device ignores the re-
ceived message bytes until ATN signal is deasserted,
the Successful Operation bit is set in the INSTREG, and
the CMDREG is cleared.
Receive Commands Command
(Command Code 29H/A9H)
The Receive Commands Command is used by the
Target to request command bytes from the Initiator. The
Target receives the command bytes from the Initiator
while the SCSI bus is in the Command Phase. The
Successful Operation bit is set in the Interrupt Status
Register (INSTREG) upon command completion. If
ATN signal is asserted by the Initiator then Successful
Operation and Service Request bits are set in the
INSTREG, the Command Register (CMDREG) is
cleared and the command terminates prematurely. If a
parity error is detected, the device continues to receive
command bytes until the transfer is complete. However,
if the Abort on Command Data/Parity Error (ACDPE) bit
in Control Register Two (CNTLREG2) bit is set, the
command is terminated immediately. The Parity Error
(PE) bit in the Status Register (STATREG) is set and
CMDREG is cleared.
Receive Data Command
(Command Code 2AH/AAH)
The Receive Data Command is used by the Target to re-
quest data bytes from the Initiator. During this command
the Target receives the data bytes from the Initiator
while the SCSI bus is in the Data-Out Phase. The Suc-
cessful Operation bit is set in the Interrupt Status Regis-
ter (INSTREG) upon command completion. If ATN sig-
nal is asserted by the Initiator then Successful Opera-
tion and Service Request bits are set in the INSTREG,
the Command Register (CMDREG) is cleared and the
command terminates prematurely. If a parity error is de-
tected, the device continues to receive data bytes until
the transfer is complete (Abort on Command/Data Par-
ity Error (ACDPE) bit in Control Register Two
(CNTLREG2) is reset). If the ACDPE bit is set, the com-
mand is terminated immediately. The Parity Error (PE)
bit in the Status Register (STATREG) is set and
CMDREG is cleared.