HI-8684 Holt Integrated Circuits, HI-8684 Datasheet - Page 3

• Manufacturer Part Number: HI-8684
• Description: (HI-8683 / HI-8684) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 8-BIT PARALLEL DATA
• Manufacturer: Holt Integrated Circuits

FUNCTIONAL DESCRIPTION (cont.)
PROTOCOL DETECTION
ARINC clock and data in the HI-8683 are derived from the
two streams of digital data at the INA and INB inputs and the
resulting One/Zero data is shifted into a 32-bit input register
as illustrated in Figure 3.
In the HI-8684, the One/Zero data shifted into the input reg-
ister is created from either the two digital outputs of the built-
in line receiver (Figure 3) or the TESTA and TESTB inputs
(Figure 4).
For ARINC 561 operation, the INA and INB data streams in-
puts must be derived from the ARINC 561 data, clock and
sync with external logic.
GAPCLK
PARITY
RESET
RINA-10
RINB-10
TESTB
TESTA
RINA
RINB
READ
ENB
INA
INB
10K
10K
HI-8683 ONLY
HI-8684 ONLY
DATABUS
25K
25K
TYPE
PROTECTION
429
429
575
561
ESD
PROTECTION
RECEIVER
LINE
ESD
&
BIT PERIOD
69 - 133
69 - 133
69 - 133
( s)
10
Table 1 - Typical Gap Detection Times
RXA
RXB
HOLT INTEGRATED CIRCUITS
Figure 1. Block Diagram
DETECT
CLOCK
DATA
MINIMUM GAP
&
HI-8683, HI-8684
310 - 599
310 - 599
103 - 200
( s)
45
CLK
DATA
DETECT
DETECT
PARITY
COUNT
3
GAP
BIT
GAP DETECTION
The end of a data word is detected by an internal counter
that times out when a data One or Zero is not received for a
period equal to 16 cycles of the GAPCLK signal. The gap
detection time may vary between 16 and 17 cycles of the
GAPCLK signal since the incoming data and GAPCLK are
not usually synchronous inputs. The required frequency of
GAPCLK is a function of the mininum gap time specified for
the type of ARINC data being received. Table 1 indicates
typical frequencies that may be used for the various data
rates normally encountered.
GAP CLOCK
MHz
0.75
1.0
1.5
0.1
0.1
0.2
32-BIT
SHIFT
REG.
BIT 32
DETECT
ERROR
32
GAP DETECTION
21.3 - 22.7
10.7 - 11.3
TIME ( s)
BIT 32
RECEIVE
160 - 170
160 - 170
BUFFER
32-BIT
16 - 17
80 - 85
32
COUNT
32-BIT
BYTE
8-BIT
MUX
TO
8
DATA RDY
ERROR
D0 - D7