HI-8684 Holt Integrated Circuits, HI-8684 Datasheet

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HI-8684

Manufacturer Part Number
HI-8684
Description
(HI-8683 / HI-8684) ARINC INTERFACE DEVICE ARINC 429 & 561 SERIAL DATA TO 8-BIT PARALLEL DATA
Manufacturer
Holt Integrated Circuits
Datasheet

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Part Number:
HI-8684PST-10
Quantity:
10
FEATURES
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DESCRIPTION
The HI-8683 and HI-8684 are system components for
interfacing incoming ARINC 429 signals to 8-bit parallel
data using proven +5V analog/digital CMOS technology.
The HI-8683 is a digital device that requires an external
analog line receiver such as the HI-8482 or HI-8588
between the ARINC bus and the device inputs. The HI-8684
incorporates the digital logic and analog line receiver
circuitry in a single device.
The HI-8683 is also available as a second source to the
DLS-112
package pinouts.
The receivers on the HI-8684 connect directly to the ARINC
429 Bus and translate the incoming signals to normal CMOS
levels. Internal comparator levels are set just below the
standard 6.5 volt minimum data threshold and just above the
standard 2.5 volt maximum null threshold. The -10 version
of the HI-8684 allows the incorporation of an external 10K
resistance in series with each ARINC input for lightning
protection without affecting ARINC level detection.
Both products offer high speed 8-bit parallel bus interface, a
32-bit buffer, and error detection for word length and parity.
A reset pin is also provided for power-on initialization.
(DS8683 Rev. D)
January 2001
561 data to 8-bit parallel data
Test inputs bypass analog inputs (HI-8684)
Automatic conversion of serial ARINC 429, 575 &
High speed parallel 8-bit data bus
Error detection -
Reset input for power-on initialization
On-chip line receiver option (HI-8684)
Input hysteresis of at least 2 volts (HI-8684)
Simplified lightning protection with the ability to add
Plastic package options - surface mount (SOIC),
10 Kohm external series resistors (HI-8684-10)
PLCC and DIP
Military processing available
with the original
word length
18 pin DIP and 28 pin PLCC
ARINC 429 & 561 Serial Data to 8-Bit Parallel Data
and
parity
HOLT INTEGRATED CIRCUITS
HI-8683, HI-8684
1
PIN CONFIGURATIONS
DATARDY
DATARDY
ARINC INTERFACE DEVICE
(See page 8 for additional pin configurations)
18-Pin Plastic SOIC - WB Package
20-Pin Plastic SOIC - WB Package
Vcc
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
10
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
1
2
3
4
5
6
7
8
9
HI-8684PST-10
HI-8684PSI-10
HI-8683PST
HI-8684PST
HI-8683PSI
HI-8684PSI
HI-8683
HI-8684
&
18
17
16
15
14
13
12
10
11
20
19
18
17
16
15
14
13
12
11
(Top View)
Vcc
GAPCLK
RESET
INB
INA
ERROR
PARITY ENB
READ
GND
GAPCLK
TESTA
TESTB
RESET
RINB (-10)
RINA (-10)
ERROR
PARITY ENB
READ
GND
01/01

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HI-8684 Summary of contents

Page 1

... Internal comparator levels are set just below the standard 6.5 volt minimum data threshold and just above the standard 2.5 volt maximum null threshold. The -10 version of the HI-8684 allows the incorporation of an external 10K resistance in series with each ARINC input for lightning protection without affecting ARINC level detection. ...

Page 2

... RECEIVER INPUTS Figure block diagram of both the HI-8683 and HI-8684. The difference between the two products is the HI-8684 has a built-in line receiver whereas the HI-8683 is strictly a digital ...

Page 3

... INA and INB inputs and the resulting One/Zero data is shifted into a 32-bit input register as illustrated in Figure 3. In the HI-8684, the One/Zero data shifted into the input reg- ister is created from either the two digital outputs of the built- in line receiver (Figure 3) or the TESTA and TESTB inputs (Figure 4) ...

Page 4

... TEST MODE (HI-8684 only) The built-in differential line receiver on the HI-8684 can be disabled allowing the data and clock detection circuitry to be driven directly with digital signals. The logical OR func- tion of the TESTA and TESTB is defined in Truth Table 1 ...

Page 5

... FIGURE 3 - RECEIVER INPUT TIMING FOR ARINC 429 TESTA TESTB DERIVED DATA DERIVED CLOCK FIGURE 4 - TEST INPUT TIMING FOR ARINC 429 32nd DERIVED DATA ARINC Bit DATA RDY READ FIGURE 5 - RECEIVER PARALLEL DATABUS TIMING HI-8683, HI-8684 ARINC Data Bits ARINC Data Bits ...

Page 6

... Leads ................................ +280°C for 10 sec Package body .....................................+220°C Storage Temperature ............. -65°C to +150°C DC ELECTRICAL CHARACTERISTICS Vcc = 5V, GND = 0V Operating Temperature Range (unless otherwise specified). PARAMETERS ARINC Bus Inputs (RINA & RINB, HI-8684 only) Differential input voltage one or zero null common mode Input resistance ...

Page 7

... READ pulse width Data delay from READ READ to data floating READ to DATA RDY clear READ pulse to next READ pulse GAPCLK frequency 32 ARINC bit to DATA RDY HI-8683, HI-8684 SYMBOL TEST CONDITIONS READ , PARITY ENA, TESTA & TESTB 5. 0.0V ...

Page 8

... HI-8684PJI 20 PIN PLASTIC PLCC HI-8684PJT 20 PIN PLASTIC PLCC HI-8684PSI 20 PIN PLASTIC SOIC - WB HI-8684PST 20 PIN PLASTIC SOIC - WB HI-8684PJI-10 20 PIN PLASTIC PLCC HI-8684PJT-10 20 PIN PLASTIC PLCC HI-8684PSI-10 20 PIN PLASTIC SOIC - WB HI-8684PST-10 20 PIN PLASTIC SOIC - WB Legend Wide Body HI-8683, HI-8684 DATA RDY D6 ...

Page 9

... PLASTIC SMALL OUTLINE (SOIC (Wide Body) .454 ± .008 (11.531 ± .203) .4065 ± .0125 (10.325 ± .318) .050 TYP (1.27) HI-8683, HI-8684 PACKAGE DIMENSIONS .905 .015 (22.99 .381) .135 .015 (3.429 .381 .100 .010 .004 (2.540 ...

Page 10

... SQ. .152 ± .002 (.3.861 ± .051) .020 MIN .320 ± .010 (.508 MIN) (8.128 ± .254) HI-8683, HI-8684 PACKAGE DIMENSIONS .296 ± .003 (7.518 ± .076) .018 TYP (.457) 0° to 8° .033 ± .017 (.838 ± .432) PIN NO. 1 IDENT .026 ± ...

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