ML4821IP Micro Linear, ML4821IP Datasheet - Page 8

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ML4821IP

Manufacturer Part Number
ML4821IP
Description
Power Factor Controller
Manufacturer
Micro Linear
Datasheet
ML4821
UNDER VOLTAGE LOCKOUT,
OVP AND CURRENT LIMIT
On power-up the ML4821 remains in the UVLO
condition; output low and quiescent current low. The IC
becomes operational when V
drops below 9V, the UVLO condition is imposed. During
the UVLO condition, the V
usable as a “flag” for starting up a down-stream PWM
converter.
8
Figure 9. Total Supply Current vs. Supply Voltage.
40
30
20
10
500
400
300
200
100
0
0
0
0
V
R
T
RMS
Figure 7. Gain Modulator Linearity.
= 5k
= 3V
100
SINE INPUT CURRENT (µA)
V
10
CC
200
SUPPLY VOLTAGE (V)
REF
CC
pin is “off”, making it
reaches 16V. When V
300
20
T
A
400
= 25°C
500
5.5
4.5
3.5
2.5
1.5
1.0
Micro Linear
CC
30
OVP, SHUTDOWN, AND IC BIAS
When the input to the OVP comparator exceeds V
output of the ML4821 is inhibited. The OVP input also
functions as a “sleep” input, putting the IC into the low
quiescent UVLO state when the OVP pin is pulled below
0.7V.
–4.0
–8.0
–12
–16
–20
–24
Figure 8. Under-Voltage Lockout Block Diagram.
0
0
Figure 10. Reference Load Regulation.
20
I
REF
+
, REFERENCE SOURCE CURRENT (mA)
40
9V
ENABLE
V
REF
T
A
INTERNAL
60
= 125°C
BIAS
+
80
T
A
= 25°C
V
4.4V
100
V
REF
LOGIC
POWER
CC
T
V
A
CC
16
15
= –55°C
= 15V
REF
120
, the

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