HT82J97A_08 HOLTEK [Holtek Semiconductor Inc], HT82J97A_08 Datasheet - Page 14

• Manufacturer Part Number: HT82J97A_08
• Description: USB Joystick Encoder 8-Bit MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

bit (TON; bit 4 of TMRC) should be set to 1. In the pulse
width measurement mode, the TON will be cleared au-
tomatically after the measurement cycle is completed.
But in the other two modes the TON can only be reset by
instructions. The overflow of the timer/event counter is
one of the wake-up sources. No matter what the opera-
tion mode is, writing a 0 to ET can disable the corre-
sponding interrupt services.
In the case of timer/event counter OFF condition, writing
data to the timer/event counter preload register will also
reload that data to the timer/event counter. But if the
timer/event counter is turned on, data written to it will
only be kept in the timer/event counter preload register.
The timer/event counter will still operate until overflow
occurs (a timer/event counter reloading will occur at the
same time). When the timer/event counter (reading
TMR) is read, the clock will be blocked to avoid errors.
As clock blocking may result in a counting error, this
must be taken into consideration by the programmer.
Input/Output Ports
There are 20 bidirectional input/output lines in the
microcontroller, labeled from PA to PC, which are
mapped to the data memory of [12H], [14H] and [16H]
respectively. All of these I/O ports can be used for input
and output operations. For input operation, these ports
are non-latching, that is, the inputs must be ready at the
T2 rising edge of instruction MOV A,[m] (m=12H, 14H
or 16H). For output operation, all the data is latched and
remains unchanged until the output latch is rewritten.
Each I/O line has its own control register (PAC, PBC,
PCC) to control the input/output configuration. With this
control register, CMOS/NMOS/PMOS output or Schmitt
trigger input with or without pull-high/low resistor struc-
tures can be reconfigured dynamically under software
Note: The outputs of PC2 and PC3 will be PWM outputs when PWM outputs are enabled.
Rev. 1.60
Input/Output Ports
14
control. To function as an input, the corresponding latch
of the control register must write a 1 . The input source
also depends on the control register. If the control regis-
ter bit is 1 , the input will read the pad state. If the con-
trol register bit is 0 , the contents of the latches will
move to the internal bus. The latter is possible in the
CMOS/NMOS/PMOS configurations can be selected
(NMOS and PMOS are available for PA only). These
control registers are mapped to locations 13H, 15H and
17H.
After a chip reset, these input/output lines remain at high
levels or in a floating state (depending on the
pull-high/low options). Each bit of these input/output
latches can be set or cleared by SET [m].i and CLR
[m].i (m=12H, 14H or 16H) instructions.
Some instructions first input data and then follow the
output operations. For example, SET [m].i , CLR
[m].i , CPL [m] , CPLA [m] read the entire port states
into the CPU, execute the defined operations
(bit-operation), and then write the results back to the
latches or the accumulator.
Each line of port A has the capability of waking-up the
device.
There are pull-high/low (PA only) options available for
I/O lines. Once the pull-high/low option of an I/O line is
selected, the I/O line have pull-high/low resistor. Other-
wise, the pull-high/low resistor is absent. It should be
noted that a non-pull-high/low I/O line operating in input
mode will cause a floating state.
It is recommended that unused or not bonded out I/O
lines should be set as output pins by software instruction
to avoid consuming power under input floating state.
read-modify-write instruction. For output function,
HT82J97E/HT82J97A
December 23, 2008