MC9S08QE128 FREESCALE [Freescale Semiconductor, Inc], MC9S08QE128 Datasheet - Page 25

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MC9S08QE128

Manufacturer Part Number
MC9S08QE128
Description
8-Bit HCS08 Central Processor Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Freescale Semiconductor
1
2
3
4
5
Num
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset or interrupt pin request. Shorter pulses are not
guaranteed to override reset requests from internal sources.
To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of t
rises above V
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
Timing is shown with respect to 20% V
10
8
9
C
D
C
C
Keyboard interrupt pulse width
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
Stop3 recovery time, from interrupt event to vector fetch
Asynchronous path
Synchronous path
LVD
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
Slew rate control enabled (PTxSE = 1)
Slew rate control disabled (PTxSE = 0)
.
RESET PIN
MC9S08QE128 Series Advance Information Data Sheet, Rev. 3
4
IRQ/KBIPx
2
Rating
KBIPx
DD
Table 12. Control Timing (continued)
and 80% V
Figure 18. IRQ/KBIPx Timing
Figure 17. Reset Timing
DD
DD
5
levels. Temperature range –40°C to 85°C.
= 3.0V, 25°C unless otherwise stated.
t
t
IHIL
ILIH
t
extrst
t
t
t
Symbol
t
ILIH,
Rise
Rise
STPREC
, t
, t
t
IHIL
Fall
Fall
1.5 x t
Min
100
cyc
Typ
TBD
TBD
TBD
TBD
Electrical Characteristics
6
1
Max
10
MSH
after V
Unit
ns
ns
ns
μs
DD
25

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