MC9S08QE128 FREESCALE [Freescale Semiconductor, Inc], MC9S08QE128 Datasheet - Page 23

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MC9S08QE128

Manufacturer Part Number
MC9S08QE128
Description
8-Bit HCS08 Central Processor Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Data in Typical column was characterized at 3.0 V, 25°C or is typical recommended value.
The resulting bus clock frequency should not exceed the maximum specified bus clock frequency of the device.
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via V
given interval.
8
9
Table 11. ICS Frequency Specifications (Temperature Range = –40 to 85°C Ambient) (continued)
C
C
C
C FLL acquisition time
C
Total deviation of trimmed DCO output frequency over voltage
and temperature
Total deviation of trimmed DCO output frequency over fixed
voltage and temperature range of 0
Long term jitter of DCO output clock (averaged over 2-ms interval)
4
Figure 15. Deviation of DCO Output from Trimmed Frequency (50.33 MHz, 3.0 V)
MC9S08QE128 Series Advance Information Data Sheet, Rev. 3
3
DD
Characteristic
and V
SS
°
C to 70
and variation in crystal oscillator frequency increase the C
TBD
°
C
Symbol
t
Δf
Δf
Acquire
C
dco_t
dco_t
Jitter
Min
Electrical Characteristics
+ 0.5
Typ
± 0.5
0.02
-1.0
Jitter
1
percentage for a
Max
± 2
± 1
0.2
1
Bus
.
%f
%f
%f
Unit
ms
dco
dco
dco
23

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