P87C52 PHILIPS [NXP Semiconductors], P87C52 Datasheet - Page 6

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P87C52

Manufacturer Part Number
P87C52
Description
80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheets

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Philips Semiconductors
PIN DESCRIPTIONS
1999 Jul 23
MNEMONIC
V
V
P0.0–0.7
P1.0–P1.7
P2.0–P2.7
P3.0–P3.7
RST
ALE
PSEN
EA
XTAL1
XTAL2
SS
DD
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I
39–32
21–28
10–17
DIP
1–8
20
40
10
12
13
14
15
16
17
30
29
31
19
18
11
1
2
7
8
9
PIN NO.
43–36
24–31
13–19
LCC
2–9
11,
22
44
11
13
14
15
16
17
18
19
10
33
32
35
21
20
2
3
8
9
37–30
40–44
18–25
7–13
QFP
1–3
16
38
40
41
5,
10
11
12
13
27
26
29
15
14
2
3
5
7
8
9
4
2
C, watchdog timer
TYPE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Ground: circuit ground potential.
Power Supply: +5 V power supply pin during normal operation, Idle mode and
Power-down mode.
Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to
them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory. In
this application, it uses strong internal pull-ups when emitting 1s.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups, except P1.6 and P1.7
which have open drain. Port 1 pins that have 1s written to them are pulled high by the
internal pull-ups and can be used as inputs. As inputs, port 1 pins that are externally pulled
low will source current because of the internal pull-ups. (See DC Electrical Characteristics:
I
address byte during program memory verification. Port 1 also serves alternate functions for
timer 2:
T2 (P1.0): Timer/counter 2 external count input (following edge triggered).
T2EX (P1.1): Timer/counter 2 trigger input.
SCL (P1.6): I
SDA (P1.7): I
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have
1s written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 2 pins that are externally being pulled low will source current because of the
internal pull-ups. (See DC Electrical Characteristics: I
address byte during fetches from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it
uses strong internal pull-ups when emitting 1s. During accesses to external data memory
that use 8-bit addresses (MOV @Ri), port 2 emits the contents of the P2 special function
register.
Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have
1s written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 3 pins that are externally being pulled low will source current because of the
pull-ups. (See DC Electrical Characteristics: I
the SC80C51 family, as listed below:
RxD (P3.0): Serial input port
TxD (P3.1): Serial output port
INT0 (P3.2): External interrupt
INT1 (P3.3): External interrupt
T0 (P3.4): Timer 0 external input
T1 (P3.5): Timer 1 external input
WR (P3.6): External data memory write strobe
RD (P3.7): External data memory read strobe
Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to V
capacitor to V
reset signal is active.
Address Latch Enable: Output pulse for latching the low byte of the address during an
access to external memory. In normal operation, ALE is emitted at a constant rate of 1/6
the oscillator frequency, and can be used for external timing or clocking. Note that one ALE
pulse is skipped during each access to external data memory.
Program Store Enable: The read strobe to external program memory. When the device is
executing code from the external program memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during each access to external data
memory. PSEN is not activated during fetches from internal program memory.
External Access Enable: EA must be externally held low during RESET to enable the
device to fetch code from external program memory locations 0000H to 7FFFH. If EA is
held high during RESET, the device executes from internal program memory unless the
program counter contains an address greater than 7FFFH. EA is don’t care after RESET.
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator
circuits.
Crystal 2: Output from the inverting oscillator amplifier.
IL
). Port 1 can sink/source one TTL (4 LSTTL) inputs. Port 1 receives the low-order
2
2
DD
C serial port clock line.
C serial port data line.
. After a watchdog timer overflow, this pin is pulled high while the internal
6
NAME AND FUNCTION
SS
permits a power-on reset using only an external
IL
). Port 3 also serves the special features of
IL
). Port 2 emits the high-order
87C524/87C528
Product specification

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