P87C52 PHILIPS [NXP Semiconductors], P87C52 Datasheet - Page 18

• Manufacturer Part Number: P87C52
• Description: 80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer
• Manufacturer: PHILIPS [NXP Semiconductors]

1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
3. Vcc = 5 V 10% during programming and verification.
*
Philips Semiconductors
EPROM CHARACTERISTICS FOR 87C528
The 87C528 is programmed by using a modified Quick-Pulse
Programming algorithm. It differs from older methods in the value
used for V
number of the ALE/PROG pulses.
The 87C528 contains two signature bytes that can be read and used
by an EPROM programming system to identify the device. The
signature bytes identify the device as an 87C528 manufactured by
Philips.
Table 6 shows the logic levels for reading the signature byte, and for
programming the program memory, the encryption table, and the
lock bits. The circuit configuration and waveforms for quick-pulse
programming are shown in Figures 14 and 15. Figure 16 shows the
circuit configuration for normal program memory verification.
Quick-Pulse Programming
The setup for microcontroller quick-pulse programming is shown in
Figure 14. Note that the 87C528 is running with a 4 to 6MHz
oscillator The reason the oscillator needs to be running is that the
device is executing internal address and program data transfers.
The address of the EPROM location to be programmed is applied to
ports 1, 2 and 3, as shown in Figure 14. The code byte to be
programmed into that location is applied to port 0. RST, PSEN and
pins of ports 2 and 3 specified in Table 6 are held at the ’Program
Code Data’ levels indicated in Table 6. The ALE/PROG is pulsed
low 25 times as shown in Figure 15.
To program the encryption table, repeat the 25 pulse programming
sequence for addresses 0 through 3FH, using the ‘Pgm Encryption
Table’ levels. Do not forget that after the encryption table is
programmed, verification cycles will produce only encrypted data.
To program the lock bits, repeat the 25 pulse programming
sequence using the ‘Pgm Lock Bit’ levels. After one lock bit is
programmed, further programming of the code memory and
encryption table is disabled. However, the other lock bit can still be
programmed.
Table 6. EPROM Programming Modes
NOTES:
1999 Jul 23
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm lock bit 1
Pgm lock bit 2
Pgm lock bit 3
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I
ALE/PROG receives 25 programming pulses while V
minimum of 10 s.
PP
= 12.75 V 0.25 V.
MODE
PP
(programming supply voltage) and in the width and
RST
1
1
1
1
1
1
1
2
C, watchdog timer
PSEN
0
0
0
0
0
0
0
PP
ALE/PROG
is held at 12.75 V. Each programming pulse is low for 100 s ( 10 s) and high for a
0*
0*
0*
0*
0*
1
1
18
EA/V
Note that the EA/V
maximum specified V
glitch above that voltage can cause permanent damage to the
device. The V
and overshoot.
Program Verification
If lock bit 2 has not been programmed, the on-chip program memory
can be read out for program verification. The address of the program
memory locations to be read is applied to ports 1, 2 and 3 as shown
in Figure 16. The other pins are held at the ‘Verify Code Data’ levels
indicated in Table 6. The contents of the address location will be
emitted on port 0. External pull ups are required on port 0 for this
operation.
If the encryption table has been programmed, the data presented at
port 0 will be the exclusive NOR of the program byte with one of the
encryption bytes. The user will have to know the encryption table
contents in order to correctly decode the verification data. The
encryption table itself cannot be read out.
Reading the Signature Bytes
The signature bytes are read by the same procedure as a normal
verification of locations 030H and 031 H, except that P3.6 and P3.7
need to be pulled to a logic low. The values are:
(030H) = 15H indicates manufactured by Philips
(031H) = 9BH indicates 87C528
Program Lock Bits
The 87C528 has 3 programmable lock bits that will provide different
levels of protection for the on-chip code and data (see Table 7).
Erasing the EPROM also erases the encryption array and the
program lock bits, returning the part to full functionality.
Program/Verify Algorithms
Any algorithm in agreement with the conditions listed in Table 6, and
which satisfies the timing specifications, is suitable.
V
V
V
V
V
1
1
PP
PP
PP
PP
PP
PP
PP
P2.7
0
1
0
1
1
1
0
source should be well regulated and free of glitches
PP
PP
pin must not be allowed to 90 above the
level for any amount of time. Even a narrow
P2.6
0
0
0
0
1
1
1
87C524/87C528
P3.7
0
1
1
1
1
0
0
Product specification
P3.6
0
1
1
0
1
0
1