NCP1611ADR2G ONSEMI [ON Semiconductor], NCP1611ADR2G Datasheet - Page 20

• Manufacturer Part Number: NCP1611ADR2G
• Description: Enhanced, High-Efficiency Power Factor Controller
• Manufacturer: ONSEMI [ON Semiconductor]

Skip Mode
near the line zero crossing where the current is very low. A
comparator monitors the pin 3 voltage (“FFcontrol”
voltage) and inhibits the drive when V
0.65 V internal reference. Switching resumes when V
exceeds 0.75 V (0.1 V hysteresis). This inhibits circuit
operation when the power transfer is particularly inefficient
at the expense of slightly increased current distortion. When
superior power factor is needed, this function can be
inhibited offsetting the “FFcontrol” pin by 0.75 V. The skip
As illustrated in Figure 61, the circuit also skips cycles
R
FF
FFcontrol pin
V
V
CONTROL
SENSE
FFcontrol pin
Vcontrol pin
BO pin
pin
pin
Figure 61. Generation of the Current Information
pin3
converter
is lower than a
converter
V to I
V to I
0.75 V / 0.65 V
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pin3
I
I
REGUL
I
BO
REGUL
20
1V
= K
mode capability is disabled whenever the PFC stage is not
in nominal operation (as dictated by the “pfcOK” signal −
see block diagram and “pfcOK Internal Signal” Section).
V
controls the on−time is gradually decreased by grounding
the V
Figure 9). Doing so, the on−time smoothly decays to zero in
three to four switching periods typically. Figure 62 shows
the practical implementation.
pin3
The circuit does not abruptly interrupt the switching when
I
REGUL
.
V
REGUL
goes below 0.65 V. Instead, the signal V
REGUL
signal applied to the V
pfcOK
pfcOK
Multiplier
I
BO
K
m
.
I
REGUL
SKIP
+
skip2
TON
RAMP
RAMP
LLine
.
processing block (see
I
BO
SUM
SUM
TON
that