HD151BF854_06 RENESAS [Renesas Technology Corp], HD151BF854_06 Datasheet

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HD151BF854 2.5 V PLL Clock Buffer for DDR Application Description The HD151BF854 is a high-performance, low-skew, low-jitter, PLL clock buffer specifically designed for use with DDR (Double Data Rate) PC motherboard application. Features Designed for DDR200/266/333/400 PC mother ...

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HD151BF854 Pin Arrangement CLKIN AVDD AGND Pin Functions Pin name No. Type AGND 11 Ground AVDD 10 Power CLKIN 8 Input FBIN 20 Input FBOUT 19 Output GND 6, 15, 28 Ground VDD 3, 12, 23 Power ...

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HD151BF854 Logic Diagram CLKIN 20 FBIN Note: All inputs and outputs are associated with V Absolute Maximum Ratings Item Supply voltage Input voltage 1 Output voltage * Input clamp current Output clamp current Continuous output current ...

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HD151BF854 Recommended Operating Conditions Item Supply voltage Output supply voltage DC input signal voltage High level input voltage High level input voltage Low level input voltage Output differential cross point voltage Output current Input clock slew rate Operating temperature Note: ...

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HD151BF854 Switching Characteristics Item Symbol Period jitter Half period jitter Cycle to cycle jitter Static phase offset Output clock skew Operating clock frequency f Application clock frequency f Slew rate Stabilization time Notes: Target of design, not 100% tested in ...

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HD151BF854 Yn Yn Note: 1. SDRAM Cin 3.5 pF × Figure 3 Output clock skew (Differential clock output) Rev.5.00 Apr 07, 2006 page Ω 120 ...

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HD151BF854 Package Dimensions JEITA Package Code RENESAS Code P-SSOP28-5.3x10.2-0.65 PRSP0028JA Index mark Rev.5.00 Apr 07, 2006 page Previous Code MASS[Typ.] FP-28DSA/FP-28DSAV 0.255g ...

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Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...