TMC2250AG1C3 CADEKA [Cadeka Microcircuits LLC.], TMC2250AG1C3 Datasheet - Page 18

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TMC2250AG1C3

Manufacturer Part Number
TMC2250AG1C3
Description
Matrix Multiplier 12 x 10 bit, 50 MHz
Manufacturer
CADEKA [Cadeka Microcircuits LLC.]
Datasheet
PRODUCT SPECIFICATION
Switching Characteristics
Application Notes
Performing Large-Kernel Pixel Interpolation
The Cascade Input and Output Ports of the TMC2250A allow the user to stack multiple devices to perform larger interpolation
kernels with no decrease in pixel throughput. Figure 12 illustrates a basic application utilizing Mode 11 to realize a 4 x 4-pixel
kernel, also called Cubic Convolution. This example utilizes the TMC2011A Variable-Length Shift Register to compensate for
the internal latency of each TMC2250A. Alternatively, some applications may utilize RAM, FIFO's, or other methods to store
multiple-line pixel data. In these cases the user may compensate for latency by simply offsetting the access sequencing of the
storage devices.
Related Products
• TMC2301 Image Resampling Sequencer
• TMC2302A Image Manipulation Sequencer
• TMC2249A Video Mixer
• TMC2242B Half-Band Filter
18
Parameter
t
t
DO
HO
Output Delay Time
Output Hold Time
Figure 12. Figure 12. Performing Cubic Convolution with Two TMC2250A's
A
B
C
D
12
12
12
12
3 X TMC2111A
C
C
LOAD
LOAD
= 25 pF
= 25 pF
Conditions
A
B
A
B
4 X 2 TMC2250A
4 X 2 TMC2250A
CASOUT
CASOUT
OUTPUT
CASIN
16
16
Min
3
Typ
REV. 1.0.2 10/25/00
Max
15
TMC2250A
Units
ns
ns

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