LAN9221i SMSC [SMSC Corporation], LAN9221i Datasheet - Page 60

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LAN9221i

Manufacturer Part Number
LAN9221i
Description
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Revision 2.6 (12-04-08)
3.12.6.3
TX Example 3
In this example a single, 111-Byte Ethernet packet will be transmitted with a TX checksum. This packet
is divided into four buffers. The four buffers are as follows:
Buffer 0:
Buffer 1:
Buffer 2:
Buffer 3:
Figure 3.15, "TX Example 1"
how data is passed to the TX data FIFO.
Note: In order to perform a TX checksum calculation on the associated packet, bit 14 (CK) of the TX
4-Byte “Data Start Offset”
4-Byte Checksum Preamble
16-Byte “Buffer End Alignment”
7-Byte “Data Start Offset”
79-Bytes of payload data
16-Byte “Buffer End Alignment”
0-Byte “Data Start Offset”
15-Bytes of payload data
16-Byte “Buffer End Alignment”
10-Byte “Data Start Offset”
17-Bytes of payload data
16-Byte “Buffer End Alignment”
Command ‘B’ must be set in conjunction with bit 13 (FS) of TX Command ‘A’ and bit 16
(TXCOE_EN) of the COE_CR register. For more information, refer to
Checksum Offload Engine
illustrates the TX command structure for this example, and also shows
(TXCOE)".
DATASHEET
60
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Section 3.6.2, "Transmit
SMSC LAN9221/LAN9221i
Datasheet

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