PIC18F2525 MICROCHIP [Microchip Technology], PIC18F2525 Datasheet - Page 183

• Manufacturer Part Number: PIC18F2525
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

17.4.4.5
When the CKP bit is cleared, the SCL output is forced
to ‘0’. However, clearing the CKP bit will not assert the
SCL output low until the SCL output is already
sampled low. Therefore, the CKP bit will not assert the
SCL line until an external I
FIGURE 17-12:
 2004 Microchip Technology Inc.
WR
SSPCON
SDA
SCL
CKP
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Clock Synchronization and
the CKP bit
CLOCK SYNCHRONIZATION TIMING
2
C master device has
DX
Master device
asserts clock
PIC18F2525/2620/4525/4620
Preliminary
already asserted the SCL line. The SCL output will
remain low until the CKP bit is set and all other
devices on the I
ensures that a write to the CKP bit will not violate the
minimum high time requirement for SCL (see
Figure 17-12).
Master device
deasserts clock
2
C bus have deasserted SCL. This
DS39626B-page 181
DX – 1