CY8CMBR2044_12 CYPRESS [Cypress Semiconductor], CY8CMBR2044_12 Datasheet - Page 5

• Manufacturer Part Number: CY8CMBR2044_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

Schematic 2: 3-Buttons, 3-LEDs, 2-Outputs to Master, and Advanced Features Enabled
In the above schematic the device is configured to support:
■
■
■
■
Document Number: 001-57451 Rev. *E
CS0–CS2 pins: 560- to CapSense buttons; CS3 pin: Ground
❐
❐
GPO0–GPO2 pins: LED and 560- to VDD; GPO3 floating;
GPO0–GPO1 pins interfaced to Master
❐
❐
C
❐
XRES pin: Floating
❐
MOD
Three CapSense buttons (CS0–CS2)
CS3 not used in design
CapSense buttons driving 3 LEDs (GPO0–GPO2)
GPO0, GPO1 interfaced to master for direct status read
Modulator capacitor
For external reset
TO MASTER
TO MASTER
pin: 2.2 nF to ground
D2
LED
R3
560E
R4
R5
VDD
LED
D1
R1
560E
5.1K( 5%)
4K(1% )
LED0
LED1
C Y 8CMBR2044
1
2
3
4
GPO 1
GPO 0
Tog gle/ FSS
D elay
D3
LED
R10
560E
VD D
U5
Scanr ate/ Sleep
VDD
■
■
■
■
To enable Serial Debug Data output, connect a 5.6 k resistor
on R11.
Toggle/FSS pin: 5.1 k to Ground
❐
❐
ARST pin: 5 k to Ground
❐
Delay pin: 4 k to Ground
❐
ScanRate/Sleep pin: 560  to Master
❐
❐
XRES
ARST
CS3
Toggle ON/OFF disabled
FSS enabled
Button Auto Reset enabled, Auto Reset period = 20 seconds
LED ON Time of 1000 ms
User configured scan rate = 30 ms
Master to control device operating mode
12
11
10
9
SCAN
XR ES
ARST
R2
VD D
C 1
10uF
560E(1% )
VDD
CY8CMBR2044
TO MASTER
C 3
0. 1uF
TP1
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