CY8CMBR2044_12 CYPRESS [Cypress Semiconductor], CY8CMBR2044_12 Datasheet - Page 3

• Manufacturer Part Number: CY8CMBR2044_12
• Manufacturer: CYPRESS [Cypress Semiconductor]

Pinout
Table 1. Pin Diagram and Definitions – CY8CMBR2044
Document Number: 001-57451 Rev. *E
Note
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2. AI – Analog Input, AIO – Analog Input / Output, AIDO – Analog Input / Digital Output, DI – Digital Input, DO – Digital Output, P – Power
Pin
GPO1
GPO0
Toggle/
FSS
Delay
CS0
CS1
V
CS2
ARST
CS3
XRES
ScanRate
/
Sleep
V
GPO3
C
GPO2
SS
DD
MOD
Label
Type
DO
DO
AI
AI
AIO
AIO
P
AIO
AIDO
AIO
DI
AI
P
DO
AI
DO
[2]
GPO activated by CS1
GPO activated by CS0
Controls FSS and Toggle
ON/OFF features
Controls LED ON Time. For
details refer to
CapSense input, controls GPO0
or serial debug data out
CapSense input, controls GPO1
or serial debug data out
Ground
CapSense input, controls GPO2
or serial debug data out
Controls Button Auto Reset
CapSense input, controls GPO3
or serial debug data out
Device reset, active high, with
internal pull down
Controls scan rate and deep
sleep
Power
GPO activated by CS3
External modulator capacitor,
connect a 2.2 nF (±10%) to
ground
GPO activated by CS2
Description
Table 2 on page 6
Leave
open
Leave
open
Ground
Ground
Ground
Ground
Ground
Leave
open
Ground
Leave
open
Ground
Leave
open
Leave
open
If Unused
Toggle/FSS
GPO1
Delay
GPO0
1
2
3
4
(Top View)
QFN
10
11
12
CY8CMBR2044
9
ScanRate/Sleep
CS3
ARST
XRES
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